[PATCH 00/22] DC Patches APRIL 7, 2025

Zaeem Mohamed zaeem.mohamed at amd.com
Tue Apr 15 14:58:46 UTC 2025


This DC patchset brings improvements in multiple areas. In summary, we have:
 
- Implement HDMI Read request
- RMCM and MCM 3DLUT support
- Enable urgent latency adjustment on DCN35
- Enable phy-ssc reduction by default
- Use 16ms AUX read interval for LTTPR with old sinks
- Init DCN35 clocks from pre-os HW value
- Refactor SubVP cursor limiting logic
- Various fixes  
 
Cc: Mark Broadworth <mark.broadworth at amd.com>

Aurabindo Pillai (1):
  drm/amd/display: fix incorrect return of vblank enable on unconfigured
    crtc

Austin Zheng (1):
  drm/amd/display: Move Mode Support Prefetch Checks To Its Own Function

Automatic Promotion (1):
  drm/amd/display: Promote DC to 3.2.329

Charlene Liu (1):
  drm/amd/display: Revert "not disable dtb as dto src at dpms off"

Chris Park (1):
  drm/amd/display: Implement HDMI Read Request

Dillon Varone (1):
  drm/amd/display: Refactor SubVP cursor limiting logic

George Shen (1):
  drm/amd/display: Use 16ms AUX read interval for LTTPR with old sinks

Gergo Koteles (1):
  drm/amd/display: do not copy invalid CRTC timing info

Jack Chang (1):
  drm/amd/display: Move desync error counter operation up.

Leo Li (2):
  drm/amd/display: Init DCN35 clocks from pre-os HW values
  drm/amd/display: Default IPS to RCG_IN_ACTIVE_IPS2_IN_OFF

Mario Limonciello (2):
  drm/amd/display: Avoid divide by zero by initializing dummy pitch to 1
  drm/amd/display: Fix ACPI edid parsing on some Lenovo systems

Meenakshikumar Somasundaram (1):
  drm/amd/display: Fix pixel rate divider policy for 1 pixel per cycle
    config

Nicholas Susanto (1):
  drm/amd/display: Enable urgent latency adjustment on DCN35

Roman Li (3):
  drm/amd/display: Fix gpu reset in multidisplay config
  drm/amd/display: Force full update in gpu reset
  drm/amd/display: enable phy-ssc reduction by default

TungYu Lu (1):
  drm/amd/display: Correct prefetch calculation

Yihan Zhu (2):
  drm/amd/display: DCN32 null data check
  drm/amd/display: DCN42 RMCM and MCM 3DLUT support

yi-lchen (1):
  drm/amd/display: To apply the adjusted DP ref clock for DP devices

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   46 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c    |    6 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |    2 +-
 .../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c  |  121 +-
 drivers/gpu/drm/amd/display/dc/core/dc.c      |   52 +-
 .../gpu/drm/amd/display/dc/core/dc_debug.c    |    2 +
 .../gpu/drm/amd/display/dc/core/dc_resource.c |   48 +-
 .../gpu/drm/amd/display/dc/core/dc_state.c    |   96 ++
 .../gpu/drm/amd/display/dc/core/dc_stream.c   |   70 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |    7 +-
 .../gpu/drm/amd/display/dc/dc_state_priv.h    |   20 +
 drivers/gpu/drm/amd/display/dc/dc_stream.h    |   11 +
 drivers/gpu/drm/amd/display/dc/dc_types.h     |   10 +-
 .../drm/amd/display/dc/dce/dce_clock_source.c |    9 +-
 .../dc/dml/dcn30/display_mode_vba_30.c        |    1 +
 .../dc/dml/dcn31/display_mode_vba_31.c        |    1 +
 .../dc/dml/dcn314/display_mode_vba_314.c      |    1 +
 .../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c  |    1 +
 .../drm/amd/display/dc/dml/dcn35/dcn35_fpu.c  |    4 +-
 .../dc/dml2/dml21/dml21_translation_helper.c  |   12 +-
 .../src/dml2_core/dml2_core_dcn4_calcs.c      | 1277 +++++++++--------
 .../display/dc/dml2/dml2_translation_helper.c |    2 +-
 .../drm/amd/display/dc/gpio/gpio_service.c    |   14 +
 .../amd/display/dc/hwss/dce110/dce110_hwseq.c |    5 +
 .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c   |   10 +-
 .../amd/display/dc/hwss/dcn32/dcn32_hwseq.c   |    4 +-
 .../amd/display/dc/hwss/dcn351/dcn351_init.c  |    2 +-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c |  353 ++++-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h |    8 +
 .../gpu/drm/amd/display/dc/inc/core_status.h  |    3 +
 .../gpu/drm/amd/display/dc/inc/core_types.h   |    5 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h   |   29 +
 drivers/gpu/drm/amd/display/dc/inc/resource.h |    2 -
 drivers/gpu/drm/amd/display/dc/irq_types.h    |    7 +
 .../drm/amd/display/dc/link/link_factory.c    |    4 +
 .../dc/link/protocols/link_dp_irq_handler.c   |    7 +-
 .../link/protocols/link_dp_training_8b_10b.c  |   54 +-
 .../drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c  |  380 ++---
 .../dc/resource/dce100/dce100_resource.c      |    4 +-
 .../dc/resource/dce110/dce110_resource.c      |    4 +-
 .../dc/resource/dce112/dce112_resource.c      |    4 +-
 .../dc/resource/dce112/dce112_resource.h      |    2 +-
 .../dc/resource/dce80/dce80_resource.c        |    4 +-
 .../dc/resource/dcn10/dcn10_resource.c        |    5 +-
 .../dc/resource/dcn20/dcn20_resource.c        |    6 +-
 .../dc/resource/dcn20/dcn20_resource.h        |    2 +-
 .../dc/resource/dcn21/dcn21_resource.c        |    6 +-
 .../dc/resource/dcn30/dcn30_resource.c        |    4 +-
 .../dc/resource/dcn30/dcn30_resource.h        |    2 +-
 .../dc/resource/dcn31/dcn31_resource.c        |    4 +-
 .../dc/resource/dcn31/dcn31_resource.h        |    2 +-
 .../dc/resource/dcn314/dcn314_resource.c      |    4 +-
 .../dc/resource/dcn314/dcn314_resource.h      |    2 +-
 .../dc/resource/dcn32/dcn32_resource.c        |   65 +-
 .../dc/resource/dcn32/dcn32_resource.h        |    6 +-
 .../dc/resource/dcn321/dcn321_resource.c      |    3 +-
 .../dc/resource/dcn35/dcn35_resource.c        |    6 +-
 .../dc/resource/dcn351/dcn351_resource.c      |    6 +-
 .../dc/resource/dcn36/dcn36_resource.c        |    6 +-
 .../dc/resource/dcn401/dcn401_resource.c      |   49 +-
 .../dc/resource/dcn401/dcn401_resource.h      |    2 +-
 .../display/include/gpio_service_interface.h  |    3 +
 62 files changed, 1825 insertions(+), 1062 deletions(-)

-- 
2.34.1



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