[PATCH 1/3] drm/amdgpu: only sync on the dependent read fences for user submission

Liang, Prike Prike.Liang at amd.com
Tue Apr 29 09:05:12 UTC 2025


[Public]

> -----Original Message-----
> From: Koenig, Christian <Christian.Koenig at amd.com>
> Sent: Tuesday, April 29, 2025 1:54 AM
> To: Liang, Prike <Prike.Liang at amd.com>; amd-gfx at lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher at amd.com>
> Subject: Re: [PATCH 1/3] drm/amdgpu: only sync on the dependent read fences
> for user submission
>
>
>
> On 4/25/25 09:20, Prike Liang wrote:
> > The driver doesn't want to sync on the DMA_RESV_USAGE_BOOKKEEP
>
> The driver doesn't want to *implicitely* sync on the...
>
> > usage fences, so here only return and sync the dependent read fences.
> >
> > Signed-off-by: Prike Liang <Prike.Liang at amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 5 ++---
> >  1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> > index 5576ed0b508f..4e1d30ecb6cc 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> > @@ -249,9 +249,8 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
> > struct amdgpu_sync *sync,
> >
> >     if (resv == NULL)
> >             return -EINVAL;
> > -
> > -   /* TODO: Use DMA_RESV_USAGE_READ here */
> > -   dma_resv_for_each_fence(&cursor, resv,
> DMA_RESV_USAGE_BOOKKEEP, f) {
> > +   /*Only return and sync the fences of usage <=
> DMA_RESV_USAGE_READ.*/
>
> That comment just repeats the obvious. We need to comment why the code does
> something and not what it does.
>
> Write something like /* Implicitly sync only to KERNEL, WRITE and READ fences
> */
>
Thanks, noted it.

> Regards,
> Christian.
>
> > +   dma_resv_for_each_fence(&cursor, resv, DMA_RESV_USAGE_READ, f) {
> >             dma_fence_chain_for_each(f, f) {
> >                     struct dma_fence *tmp = dma_fence_chain_contained(f);
> >



More information about the amd-gfx mailing list