[PATCH] drm/amdgpu/gfx10: remove redundant repeated null checks

[Alex Deucher]

On Sat, Aug 2, 2025 at 4:22 AM Ethan Carter Edwards
<ethan at ethancedwards.com> wrote:
>
> The repeated checks on grbm_soft_reset are unnecessary. Remove them.
>

These are not NULL checks and they are necessary.  The code is
checking if any bits are set in that register.  If not, then we can
skip that code as there is nothing to do.

Alex

> Signed-off-by: Ethan Carter Edwards <ethan at ethancedwards.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 24 +++++++++++-------------
>  1 file changed, 11 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 7bd506f06eb155de7f2edb2c1c9d5ed7232b16fc..264183ab24ec299425e6a6d0539339ee69f60c24 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -7668,19 +7668,17 @@ static int gfx_v10_0_soft_reset(struct amdgpu_ip_block *ip_block)
>                 /* Disable MEC parsing/prefetching */
>                 gfx_v10_0_cp_compute_enable(adev, false);
>
> -               if (grbm_soft_reset) {
> -                       tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
> -                       tmp |= grbm_soft_reset;
> -                       dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp);
> -                       WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);
> -                       tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
> -
> -                       udelay(50);
> -
> -                       tmp &= ~grbm_soft_reset;
> -                       WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);
> -                       tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
> -               }
> +               tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
> +               tmp |= grbm_soft_reset;
> +               dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp);
> +               WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);
> +               tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
> +
> +               udelay(50);
> +
> +               tmp &= ~grbm_soft_reset;
> +               WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);
> +               tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);
>
>                 /* Wait a little for things to settle down */
>                 udelay(50);
>
> ---
> base-commit: b9ddaa95fd283bce7041550ddbbe7e764c477110
> change-id: 20250801-amdgfx10-f96c43cb0c59
>
> Best regards,
> --
> Ethan Carter Edwards <ethan at ethancedwards.com>
>