[PATCH 3/7] drm/amd/display: Find first CRTC and its line time in dce110_fill_display_configs

Alex Deucher alexdeucher at gmail.com
Mon Aug 4 15:57:52 UTC 2025


On Thu, Jul 31, 2025 at 6:03 AM Timur Kristóf <timur.kristof at gmail.com> wrote:
>
> dce110_fill_display_configs is shared between DCE 6-11, and
> finding the first CRTC and its line time is relevant to DCE 6 too.
> Move the code to find it from DCE 11 specific code.
>
> Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  .../dc/clk_mgr/dce110/dce110_clk_mgr.c        | 30 ++++++++++++-------
>  1 file changed, 20 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
> index f8409453434c..baeac8f1c04f 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
> @@ -120,9 +120,12 @@ void dce110_fill_display_configs(
>         const struct dc_state *context,
>         struct dm_pp_display_configuration *pp_display_cfg)
>  {
> +       struct dc *dc = context->clk_mgr->ctx->dc;
>         int j;
>         int num_cfgs = 0;
>
> +       pp_display_cfg->crtc_index = dc->res_pool->res_cap->num_timing_generator;
> +
>         for (j = 0; j < context->stream_count; j++) {
>                 int k;
>
> @@ -164,6 +167,23 @@ void dce110_fill_display_configs(
>                 cfg->v_refresh /= stream->timing.h_total;
>                 cfg->v_refresh = (cfg->v_refresh + stream->timing.v_total / 2)
>                                                         / stream->timing.v_total;
> +
> +               /* Find first CRTC index and calculate its line time.
> +                * This is necessary for DPM on SI GPUs.
> +                */
> +               if (cfg->pipe_idx < pp_display_cfg->crtc_index) {
> +                       const struct dc_crtc_timing *timing =
> +                               &context->streams[0]->timing;
> +
> +                       pp_display_cfg->crtc_index = cfg->pipe_idx;
> +                       pp_display_cfg->line_time_in_us =
> +                               timing->h_total * 10000 / timing->pix_clk_100hz;
> +               }
> +       }
> +
> +       if (!num_cfgs) {
> +               pp_display_cfg->crtc_index = 0;
> +               pp_display_cfg->line_time_in_us = 0;
>         }
>
>         pp_display_cfg->display_count = num_cfgs;
> @@ -232,16 +252,6 @@ void dce11_pplib_apply_display_requirements(
>
>         dce110_fill_display_configs(context, pp_display_cfg);
>
> -       /* TODO: is this still applicable?*/
> -       if (pp_display_cfg->display_count == 1) {
> -               const struct dc_crtc_timing *timing =
> -                       &context->streams[0]->timing;
> -
> -               pp_display_cfg->crtc_index =
> -                       pp_display_cfg->disp_configs[0].pipe_idx;
> -               pp_display_cfg->line_time_in_us = timing->h_total * 10000 / timing->pix_clk_100hz;
> -       }
> -
>         if (memcmp(&dc->current_state->pp_display_cfg, pp_display_cfg, sizeof(*pp_display_cfg)) !=  0)
>                 dm_pp_apply_display_requirements(dc->ctx, pp_display_cfg);
>  }
> --
> 2.50.1
>


More information about the amd-gfx mailing list