[PATCH 2/2] drm/amd/vcn: Add late_init callback for VCN v4.0.3 reset handling

[Alex Deucher]

On Fri, Aug 8, 2025 at 8:49 AM Jesse.Zhang <Jesse.Zhang at amd.com> wrote:
>
> From: Ruili Ji <ruiliji2 at amd.com>
>
> This change reorganizes VCN reset capability detection by:
>
> 1. Moving reset mask configuration from sw_init to new late_init phase
> 2. Adding vcn_v4_0_3_late_init() to properly check for per-queue reset support
> 3. Only setting soft full reset mask as fallback when per-queue reset isn't supported
> 4. Removing TODO comment now that queue reset support is implemented
>
> The late initialization allows proper evaluation of SMU capabilities after
> full system initialization, while maintaining the previous behavior when
> per-queue reset isn't available.
>
> Signed-off-by: Ruili Ji <ruiliji2 at amd.com>
> Signed-off-by: Jesse Zhang <Jesse.Zhang at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> index 019bd362edb2..55dd86061115 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> @@ -134,6 +134,18 @@ static int vcn_v4_0_3_early_init(struct amdgpu_ip_block *ip_block)
>         return 0;
>  }
>
> +static int vcn_v4_0_3_late_init(struct amdgpu_ip_block *ip_block)
> +{
> +       struct amdgpu_device *adev = ip_block->adev;
> +
> +       if (amdgpu_dpm_reset_vcn_is_supported(adev))
> +               adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> +       else
> +               adev->vcn.supported_reset =
> +                       amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]);

The else case can be dropped here and left where it is now.


> +       return 0;
> +}
> +
>  static int vcn_v4_0_3_fw_shared_init(struct amdgpu_device *adev, int inst_idx)
>  {
>         struct amdgpu_vcn4_fw_shared *fw_shared;
> @@ -211,10 +223,6 @@ static int vcn_v4_0_3_sw_init(struct amdgpu_ip_block *ip_block)
>                         adev->vcn.inst[i].pause_dpg_mode = vcn_v4_0_3_pause_dpg_mode;
>         }
>
> -       /* TODO: Add queue reset mask when FW fully supports it */
> -       adev->vcn.supported_reset =
> -               amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]);
> -

This part can stay here as this is unrelated to PMFW versions.  You
can drop the TODO comment however.

>         if (amdgpu_sriov_vf(adev)) {
>                 r = amdgpu_virt_alloc_mm_table(adev);
>                 if (r)
> @@ -1871,6 +1879,7 @@ static void vcn_v4_0_3_set_irq_funcs(struct amdgpu_device *adev)
>  static const struct amd_ip_funcs vcn_v4_0_3_ip_funcs = {
>         .name = "vcn_v4_0_3",
>         .early_init = vcn_v4_0_3_early_init,
> +       .late_init = vcn_v4_0_3_late_init,
>         .sw_init = vcn_v4_0_3_sw_init,
>         .sw_fini = vcn_v4_0_3_sw_fini,
>         .hw_init = vcn_v4_0_3_hw_init,
> @@ -2073,6 +2082,7 @@ static int vcn_v4_0_3_ras_late_init(struct amdgpu_device *adev, struct ras_commo
>
>         r = amdgpu_ras_bind_aca(adev, AMDGPU_RAS_BLOCK__VCN,
>                                 &vcn_v4_0_3_aca_info, NULL);
> +

unrelated change.

Alex

>         if (r)
>                 goto late_fini;
>
> --
> 2.49.0
>