[PATCH 2/4 v4] drm/amdgpu: Add functions to get/clear bank count
Wang, Yang(Kevin)
KevinYang.Wang at amd.com
Mon Aug 18 01:32:27 UTC 2025
[AMD Official Use Only - AMD Internal Distribution Only]
+size_t amdgpu_aca_get_bank_count(struct amdgpu_device *adev);
It's better to change the function type from 'size_t' to 'u64', and the 'size_t' might a risk on 32bit system.
With that fixed, the patch #1- #3 is
Reviewed-by: Yang Wang <kevinyang.wang at amd.com>
Best Regards,
Kevin
-----Original Message-----
From: Sun, Ce(Overlord) <Ce.Sun at amd.com>
Sent: Sunday, August 17, 2025 17:13
To: amd-gfx at lists.freedesktop.org
Cc: Zhou1, Tao <Tao.Zhou1 at amd.com>; Yang, Stanley <Stanley.Yang at amd.com>; Zhang, Hawking <Hawking.Zhang at amd.com>; Wang, Yang(Kevin) <KevinYang.Wang at amd.com>; Chai, Thomas <YiPeng.Chai at amd.com>; Sun, Ce(Overlord) <Ce.Sun at amd.com>; Liu, Xiang(Dean) <Xiang.Liu at amd.com>
Subject: [PATCH 2/4 v4] drm/amdgpu: Add functions to get/clear bank count
Add the amdgpu_aca_get_bank_count/amdgpu_aca_clear_bank_count interface
Signed-off-by: Ce Sun <cesun102 at amd.com>
Signed-off-by: Xiang Liu <xiang.liu at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 10 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h | 2 ++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
index 090bf6cf1b91..32164d62c4dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
@@ -480,6 +480,8 @@ static int aca_banks_update(struct amdgpu_device *adev, enum aca_smu_type type,
goto err_release_banks;
}
+ atomic64_add(banks.nr_banks, &aca->bank_count);
+
ret = aca_dispatch_banks(&aca->mgr, &banks, type,
handler, data);
if (ret)
@@ -766,6 +768,7 @@ int amdgpu_aca_init(struct amdgpu_device *adev)
int ret;
atomic_set(&aca->ue_update_flag, 0);
+ atomic64_set(&aca->bank_count, 0);
ret = aca_manager_init(&aca->mgr);
if (ret)
@@ -781,6 +784,7 @@ void amdgpu_aca_fini(struct amdgpu_device *adev)
aca_manager_fini(&aca->mgr);
atomic_set(&aca->ue_update_flag, 0);
+ atomic64_set(&aca->bank_count, 0);
}
int amdgpu_aca_reset(struct amdgpu_device *adev) @@ -788,6 +792,7 @@ int amdgpu_aca_reset(struct amdgpu_device *adev)
struct amdgpu_aca *aca = &adev->aca;
atomic_set(&aca->ue_update_flag, 0);
+ atomic64_set(&aca->bank_count, 0);
return 0;
}
@@ -865,6 +870,11 @@ int amdgpu_aca_smu_set_debug_mode(struct amdgpu_device *adev, bool en)
return smu_funcs->set_debug_mode(adev, en); }
+size_t amdgpu_aca_get_bank_count(struct amdgpu_device *adev) {
+ return atomic64_read(&adev->aca.bank_count);
+}
+
#if defined(CONFIG_DEBUG_FS)
static int amdgpu_aca_smu_debug_mode_set(void *data, u64 val) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
index 38c88897e1ec..fd0b55469a2d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
@@ -202,6 +202,7 @@ struct amdgpu_aca {
const struct aca_smu_funcs *smu_funcs;
atomic_t ue_update_flag;
bool is_enabled;
+ atomic64_t bank_count;
};
struct aca_info {
@@ -225,6 +226,7 @@ void amdgpu_aca_remove_handle(struct aca_handle *handle); int amdgpu_aca_get_error_data(struct amdgpu_device *adev, struct aca_handle *handle,
enum aca_error_type type, struct ras_err_data *err_data,
struct ras_query_context *qctx);
+size_t amdgpu_aca_get_bank_count(struct amdgpu_device *adev);
int amdgpu_aca_smu_set_debug_mode(struct amdgpu_device *adev, bool en); void amdgpu_aca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root); int aca_error_cache_log_bank_error(struct aca_handle *handle, struct aca_bank_info *info,
--
2.34.1
More information about the amd-gfx
mailing list