[RFC PATCH 5/7] drm/amdgpu: Implement TTM handling for MMIO_REMAP placement

[Alex Deucher]

On Wed, Aug 20, 2025 at 8:28 AM Srinivasan Shanmugam
<srinivasan.shanmugam at amd.com> wrote:
>
> Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves
> as a CPU-visible IO page:
>
> * amdgpu_evict_flags(): mark as unmovable
> * amdgpu_res_cpu_visible(): consider CPU-visible
> * amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP
> * amdgpu_ttm_io_mem_reserve(): program bus.offset/is_iomem/caching using
>   the device's mmio_remap_* metadata
> * amdgpu_ttm_io_mem_pfn(): return PFN for the remapped HDP page
> * amdgpu_ttm_tt_pde_flags(): set AMDGPU_PTE_SYSTEM for this mem type
>
> Cc: Christian König <christian.koenig at amd.com>
> Cc: Alex Deucher <alexander.deucher at amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 26 +++++++++++++++++++++----
>  1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 27ab4e754b2a..157a5416a826 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -123,6 +123,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
>         case AMDGPU_PL_GWS:
>         case AMDGPU_PL_OA:
>         case AMDGPU_PL_DOORBELL:
> +       case AMDGPU_PL_MMIO_REMAP:
>                 placement->num_placement = 0;
>                 return;
>
> @@ -447,7 +448,8 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
>                 return false;
>
>         if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT ||
> -           res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL)
> +           res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL ||
> +               res->mem_type == AMDGPU_PL_MMIO_REMAP)
>                 return true;
>
>         if (res->mem_type != TTM_PL_VRAM)
> @@ -538,10 +540,12 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
>             old_mem->mem_type == AMDGPU_PL_GWS ||
>             old_mem->mem_type == AMDGPU_PL_OA ||
>             old_mem->mem_type == AMDGPU_PL_DOORBELL ||
> +           old_mem->mem_type == AMDGPU_PL_MMIO_REMAP ||
>             new_mem->mem_type == AMDGPU_PL_GDS ||
>             new_mem->mem_type == AMDGPU_PL_GWS ||
>             new_mem->mem_type == AMDGPU_PL_OA ||
> -           new_mem->mem_type == AMDGPU_PL_DOORBELL) {
> +           new_mem->mem_type == AMDGPU_PL_DOORBELL ||
> +           new_mem->mem_type == AMDGPU_PL_MMIO_REMAP) {
>                 /* Nothing to save here */
>                 amdgpu_bo_move_notify(bo, evict, new_mem);
>                 ttm_bo_move_null(bo, new_mem);
> @@ -629,6 +633,12 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
>                 mem->bus.is_iomem = true;
>                 mem->bus.caching = ttm_uncached;
>                 break;
> +       case AMDGPU_PL_MMIO_REMAP:  /* <=== New HDP domain for remap page */

This comment can be dropped.  It's just a remapping range.  We've only
used it for the HDP registers, but it could be used for other things
in the future.

> +               mem->bus.offset  = ((resource_size_t)mem->start << PAGE_SHIFT);
> +               mem->bus.offset += adev->mmio_remap_base + adev->mmio_remap_offset;

This should be the same as the doorbell handling, just replace
adev->doorbell.base with adev->mmio_remap.base

Alex

> +               mem->bus.is_iomem = true;
> +               mem->bus.caching = ttm_uncached;
> +               break;
>         default:
>                 return -EINVAL;
>         }
> @@ -640,12 +650,20 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
>  {
>         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
>         struct amdgpu_res_cursor cursor;
> +       u64 pfn;
>
>         amdgpu_res_first(bo->resource, (u64)page_offset << PAGE_SHIFT, 0,
>                          &cursor);
>
> -       if (bo->resource->mem_type == AMDGPU_PL_DOORBELL)
> +       if (bo->resource->mem_type == AMDGPU_PL_DOORBELL) {
>                 return ((uint64_t)(adev->doorbell.base + cursor.start)) >> PAGE_SHIFT;
> +       } else if (bo->resource->mem_type == AMDGPU_PL_MMIO_REMAP) {
> +               /* Return PFN for the remapped HDP page */
> +               pfn = (u64)adev->mmio_remap_base +
> +                       (u64)adev->mmio_remap_offset +
> +                       (u64)cursor.start;
> +               return (unsigned long)(pfn >> PAGE_SHIFT);
> +       }
>
>         return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
>  }
> @@ -1355,7 +1373,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
>
>         if (mem && (mem->mem_type == TTM_PL_TT ||
>                     mem->mem_type == AMDGPU_PL_DOORBELL ||
> -                   mem->mem_type == AMDGPU_PL_PREEMPT)) {
> +                   mem->mem_type == AMDGPU_PL_PREEMPT || mem->mem_type == AMDGPU_PL_MMIO_REMAP)) {
>                 flags |= AMDGPU_PTE_SYSTEM;
>
>                 if (ttm->caching == ttm_cached)
> --
> 2.34.1
>