[PATCH] drm/amdgpu/vpe: add ring reset support

[Zhang, Jesse(Jie)]

[AMD Official Use Only - AMD Internal Distribution Only]

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Friday, August 22, 2025 3:55 AM
To: amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>
Subject: [PATCH] drm/amdgpu/vpe: add ring reset support

Implement ring reset for VPE.  Similar to VCN and JPEG, just powergate the the IP to reset it.

v2: Properly set per queue reset flag

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
index 121ee17b522bd..4cf5f273a3144 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
@@ -382,6 +382,8 @@ static int vpe_sw_init(struct amdgpu_ip_block *ip_block)


Maybe we can remove the following comment.  With that fix,  Reviewed-by: "Jesse.zhang"@amd.com"

Thanks
Jesse
        /* TODO: Add queue reset mask when FW fully supports it */

        adev->vpe.supported_reset =
                 amdgpu_get_soft_full_reset_mask(&adev->vpe.ring);
+       if (!amdgpu_sriov_vf(adev))
+               adev->vpe.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
        ret = amdgpu_vpe_sysfs_reset_mask_init(adev);
        if (ret)
                goto out;
@@ -874,6 +876,27 @@ static void vpe_ring_end_use(struct amdgpu_ring *ring)
        schedule_delayed_work(&adev->vpe.idle_work, VPE_IDLE_TIMEOUT);  }

+static int vpe_ring_reset(struct amdgpu_ring *ring,
+                         unsigned int vmid,
+                         struct amdgpu_fence *timedout_fence) {
+       struct amdgpu_device *adev = ring->adev;
+       int r;
+
+       amdgpu_ring_reset_helper_begin(ring, timedout_fence);
+
+       r = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VPE,
+                                                  AMD_PG_STATE_GATE);
+       if (r)
+               return r;
+       r = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VPE,
+                                                  AMD_PG_STATE_UNGATE);
+       if (r)
+               return r;
+
+       return amdgpu_ring_reset_helper_end(ring, timedout_fence); }
+
 static ssize_t amdgpu_get_vpe_reset_mask(struct device *dev,
                                                struct device_attribute *attr,
                                                char *buf)
@@ -942,6 +965,7 @@ static const struct amdgpu_ring_funcs vpe_ring_funcs = {
        .preempt_ib = vpe_ring_preempt_ib,
        .begin_use = vpe_ring_begin_use,
        .end_use = vpe_ring_end_use,
+       .reset = vpe_ring_reset,
 };

 static void vpe_set_ring_funcs(struct amdgpu_device *adev)
--
2.50.1