[PATCH v3 1/9] drm/amdgpu/uapi: Introduce AMDGPU_GEM_DOMAIN_MMIO_REMAP

Alex Deucher alexdeucher at gmail.com
Thu Aug 28 15:20:20 UTC 2025


On Thu, Aug 28, 2025 at 5:53 AM Srinivasan Shanmugam
<srinivasan.shanmugam at amd.com> wrote:
>
> Add a new GEM domain bit AMDGPU_GEM_DOMAIN_MMIO_REMAP to allow
> userspace to request the MMIO remap (HDP flush) page via GEM_CREATE.
>
> - include/uapi/drm/amdgpu_drm.h:
>   * define AMDGPU_GEM_DOMAIN_MMIO_REMAP
>   * include the bit in AMDGPU_GEM_DOMAIN_MASK
>
> v2: Add early reject in amdgpu_gem_create_ioctl() (Alex).
>
> Cc: Christian König <christian.koenig at amd.com>
> Suggested-by: Alex Deucher <alexander.deucher at amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam at amd.com>
> Reviewed-by: Christian König <christian.koenig at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 3 +++
>  include/uapi/drm/amdgpu_drm.h           | 8 ++++++--
>  2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index e3f65977eeee..d3c369742124 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -465,6 +465,9 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
>         /* always clear VRAM */
>         flags |= AMDGPU_GEM_CREATE_VRAM_CLEARED;
>
> +       if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP)
> +               return -EINVAL;
> +
>         /* create a gem object to contain this object in */
>         if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
>             AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index bdedbaccf776..fc44e301adbb 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -103,6 +103,8 @@ extern "C" {
>   *
>   * %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell. It is an MMIO region for
>   * signalling user mode queues.
> + *
> + * %AMDGPU_GEM_DOMAIN_MMIO_REMAP       MMIO remap page (special mapping for HDP flushing).
>   */
>  #define AMDGPU_GEM_DOMAIN_CPU          0x1
>  #define AMDGPU_GEM_DOMAIN_GTT          0x2
> @@ -111,13 +113,15 @@ extern "C" {
>  #define AMDGPU_GEM_DOMAIN_GWS          0x10
>  #define AMDGPU_GEM_DOMAIN_OA           0x20
>  #define AMDGPU_GEM_DOMAIN_DOORBELL     0x40
> +#define AMDGPU_GEM_DOMAIN_MMIO_REMAP   0x80
>  #define AMDGPU_GEM_DOMAIN_MASK         (AMDGPU_GEM_DOMAIN_CPU | \
>                                          AMDGPU_GEM_DOMAIN_GTT | \
>                                          AMDGPU_GEM_DOMAIN_VRAM | \
>                                          AMDGPU_GEM_DOMAIN_GDS | \
>                                          AMDGPU_GEM_DOMAIN_GWS | \
> -                                        AMDGPU_GEM_DOMAIN_OA | \
> -                                        AMDGPU_GEM_DOMAIN_DOORBELL)
> +                                        AMDGPU_GEM_DOMAIN_OA | \
> +                                        AMDGPU_GEM_DOMAIN_DOORBELL | \
> +                                        AMDGPU_GEM_DOMAIN_MMIO_REMAP)
>
>  /* Flag that CPU access will be required for the case of VRAM domain */
>  #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED  (1 << 0)
> --
> 2.34.1
>


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