[PATCH 21/44] drm/amdgpu/vcn: adjust pause_dpg_mode function signature
Boyuan Zhang
Boyuan.Zhang at amd.com
Thu Feb 6 13:40:15 UTC 2025
On 2025-01-31 11:57, Alex Deucher wrote:
> Change it to take a vcn instance rather than adev to align
> with the vcn instance changes.
>
> TODO: clean up the function internals to use the vinst state
> directly rather than accessing it indirectly via adev->vcn.inst[].
>
> Signed-off-by: Alex Deucher<alexander.deucher at amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang at amd.com>
<mailto:Boyuan.Zhang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 3 +--
> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 14 ++++++++------
> drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 12 +++++++-----
> drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 10 ++++++----
> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 12 +++++++-----
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 15 ++++++++-------
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 11 +++++------
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 13 +++++++------
> drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 15 ++++++++-------
> 10 files changed, 59 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index 010cc64a950a4..a2250747a7c81 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -417,7 +417,7 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
> else
> new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
>
> - adev->vcn.inst[i].pause_dpg_mode(adev, i, &new_state);
> + adev->vcn.inst[i].pause_dpg_mode(vcn_inst, &new_state);
> }
>
> fence[i] += amdgpu_fence_count_emitted(&vcn_inst->ring_dec);
> @@ -474,7 +474,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
> new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
> }
>
> - adev->vcn.inst[ring->me].pause_dpg_mode(adev, ring->me, &new_state);
> + adev->vcn.inst[ring->me].pause_dpg_mode(&adev->vcn.inst[ring->me], &new_state);
> }
> mutex_unlock(&adev->vcn.inst[ring->me].vcn_pg_lock);
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> index 5f92cf28cc752..8d34e3814ab19 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> @@ -327,8 +327,7 @@ struct amdgpu_vcn_inst {
> bool indirect_sram;
> struct amdgpu_vcn_reg internal;
> struct mutex vcn1_jpeg1_workaround;
> - int (*pause_dpg_mode)(struct amdgpu_device *adev,
> - int inst_idx,
> + int (*pause_dpg_mode)(struct amdgpu_vcn_inst *vinst,
> struct dpg_pause_state *new_state);
> bool using_unified_queue;
> };
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index 613f17be9d829..3d56660fd90a9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -87,8 +87,8 @@ static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev);
> static int vcn_v1_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> -static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state);
> +static int vcn_v1_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state);
>
> static void vcn_v1_0_idle_work_handler(struct work_struct *work);
> static void vcn_v1_0_ring_begin_use(struct amdgpu_ring *ring);
> @@ -1264,9 +1264,11 @@ static int vcn_v1_0_stop(struct amdgpu_vcn_inst *vinst)
> return r;
> }
>
> -static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state)
> +static int vcn_v1_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state)
> {
> + struct amdgpu_device *adev = vinst->adev;
> + int inst_idx = vinst->inst;
> int ret_code;
> uint32_t reg_data = 0;
> uint32_t reg_data2 = 0;
> @@ -1866,7 +1868,7 @@ static void vcn_v1_0_idle_work_handler(struct work_struct *work)
> else
> new_state.jpeg = VCN_DPG_STATE__UNPAUSE;
>
> - adev->vcn.inst[0].pause_dpg_mode(adev, 0, &new_state);
> + adev->vcn.inst->pause_dpg_mode(vcn_inst, &new_state);
> }
>
> fences += amdgpu_fence_count_emitted(adev->jpeg.inst->ring_dec);
> @@ -1933,7 +1935,7 @@ void vcn_v1_0_set_pg_for_begin_use(struct amdgpu_ring *ring, bool set_clocks)
> else if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG)
> new_state.jpeg = VCN_DPG_STATE__PAUSE;
>
> - adev->vcn.inst[0].pause_dpg_mode(adev, 0, &new_state);
> + adev->vcn.inst->pause_dpg_mode(adev->vcn.inst, &new_state);
> }
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index aa61d3b54f8c2..e4305687749a8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -94,8 +94,8 @@ static void vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev);
> static int vcn_v2_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> -static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state);
> +static int vcn_v2_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state);
> static int vcn_v2_0_start_sriov(struct amdgpu_device *adev);
> /**
> * vcn_v2_0_early_init - set function pointers and load microcode
> @@ -1158,7 +1158,7 @@ static int vcn_v2_0_stop_dpg_mode(struct amdgpu_vcn_inst *vinst)
> struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
> uint32_t tmp;
>
> - vcn_v2_0_pause_dpg_mode(adev, 0, &state);
> + vcn_v2_0_pause_dpg_mode(vinst, &state);
> /* Wait for power status to be 1 */
> SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1,
> UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);
> @@ -1252,9 +1252,11 @@ static int vcn_v2_0_stop(struct amdgpu_vcn_inst *vinst)
> return 0;
> }
>
> -static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state)
> +static int vcn_v2_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state)
> {
> + struct amdgpu_device *adev = vinst->adev;
> + int inst_idx = vinst->inst;
> struct amdgpu_ring *ring;
> uint32_t reg_data = 0;
> int ret_code;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> index 69cf42a4a3f18..d5921a954948e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> @@ -100,8 +100,8 @@ static int vcn_v2_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> int i);
> static int vcn_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> -static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state);
> +static int vcn_v2_5_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state);
> static int vcn_v2_5_sriov_start(struct amdgpu_device *adev);
> static void vcn_v2_5_set_ras_funcs(struct amdgpu_device *adev);
>
> @@ -1506,9 +1506,11 @@ static int vcn_v2_5_stop(struct amdgpu_vcn_inst *vinst)
> return 0;
> }
>
> -static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state)
> +static int vcn_v2_5_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state)
> {
> + struct amdgpu_device *adev = vinst->adev;
> + int inst_idx = vinst->inst;
> struct amdgpu_ring *ring;
> uint32_t reg_data = 0;
> int ret_code = 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> index f6f4f04d74339..2a17a7e108001 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> @@ -110,8 +110,8 @@ static int vcn_v3_0_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> int i);
> static int vcn_v3_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> -static int vcn_v3_0_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state);
> +static int vcn_v3_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state);
>
> static void vcn_v3_0_dec_ring_set_wptr(struct amdgpu_ring *ring);
> static void vcn_v3_0_enc_ring_set_wptr(struct amdgpu_ring *ring);
> @@ -1581,7 +1581,7 @@ static int vcn_v3_0_stop_dpg_mode(struct amdgpu_vcn_inst *vinst)
> struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
> uint32_t tmp;
>
> - vcn_v3_0_pause_dpg_mode(adev, inst_idx, &state);
> + vcn_v3_0_pause_dpg_mode(vinst, &state);
>
> /* Wait for power status to be 1 */
> SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,
> @@ -1680,9 +1680,11 @@ static int vcn_v3_0_stop(struct amdgpu_vcn_inst *vinst)
> return 0;
> }
>
> -static int vcn_v3_0_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state)
> +static int vcn_v3_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state)
> {
> + struct amdgpu_device *adev = vinst->adev;
> + int inst_idx = vinst->inst;
> volatile struct amdgpu_fw_shared *fw_shared;
> struct amdgpu_ring *ring;
> uint32_t reg_data = 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> index 3d70e2cc81982..2ad217470c8c6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> @@ -101,8 +101,8 @@ static int vcn_v4_0_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> int i);
> static int vcn_v4_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> -static int vcn_v4_0_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state);
> +static int vcn_v4_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state);
> static void vcn_v4_0_unified_ring_set_wptr(struct amdgpu_ring *ring);
> static void vcn_v4_0_set_ras_funcs(struct amdgpu_device *adev);
>
> @@ -1565,7 +1565,7 @@ static void vcn_v4_0_stop_dpg_mode(struct amdgpu_vcn_inst *vinst)
> struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
> uint32_t tmp;
>
> - vcn_v4_0_pause_dpg_mode(adev, inst_idx, &state);
> + vcn_v4_0_pause_dpg_mode(vinst, &state);
> /* Wait for power status to be 1 */
> SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1,
> UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);
> @@ -1671,15 +1671,16 @@ static int vcn_v4_0_stop(struct amdgpu_vcn_inst *vinst)
> /**
> * vcn_v4_0_pause_dpg_mode - VCN pause with dpg mode
> *
> - * @adev: amdgpu_device pointer
> - * @inst_idx: instance number index
> + * @vinst: VCN instance
> * @new_state: pause state
> *
> * Pause dpg mode for VCN block
> */
> -static int vcn_v4_0_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx,
> - struct dpg_pause_state *new_state)
> +static int vcn_v4_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state)
> {
> + struct amdgpu_device *adev = vinst->adev;
> + int inst_idx = vinst->inst;
> uint32_t reg_data = 0;
> int ret_code;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> index a3fbfaac76603..ae7733c0d032e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> @@ -92,8 +92,8 @@ static int vcn_v4_0_3_set_powergating_state_inst(struct amdgpu_ip_block *ip_bloc
> int i);
> static int vcn_v4_0_3_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> -static int vcn_v4_0_3_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state);
> +static int vcn_v4_0_3_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state);
> static void vcn_v4_0_3_unified_ring_set_wptr(struct amdgpu_ring *ring);
> static void vcn_v4_0_3_set_ras_funcs(struct amdgpu_device *adev);
> static void vcn_v4_0_3_enable_ras(struct amdgpu_device *adev,
> @@ -1449,14 +1449,13 @@ static int vcn_v4_0_3_stop(struct amdgpu_vcn_inst *vinst)
> /**
> * vcn_v4_0_3_pause_dpg_mode - VCN pause with dpg mode
> *
> - * @adev: amdgpu_device pointer
> - * @inst_idx: instance number index
> + * @vinst: VCN instance
> * @new_state: pause state
> *
> * Pause dpg mode for VCN block
> */
> -static int vcn_v4_0_3_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx,
> - struct dpg_pause_state *new_state)
> +static int vcn_v4_0_3_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state)
> {
>
> return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> index 295f39b2222d5..a00c74d287a69 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> @@ -100,8 +100,8 @@ static int vcn_v4_0_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_bloc
> int i);
> static int vcn_v4_0_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> -static int vcn_v4_0_5_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state);
> +static int vcn_v4_0_5_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state);
> static void vcn_v4_0_5_unified_ring_set_wptr(struct amdgpu_ring *ring);
>
> /**
> @@ -1321,15 +1321,16 @@ static int vcn_v4_0_5_stop(struct amdgpu_vcn_inst *vinst)
> /**
> * vcn_v4_0_5_pause_dpg_mode - VCN pause with dpg mode
> *
> - * @adev: amdgpu_device pointer
> - * @inst_idx: instance number index
> + * @vinst: VCN instance
> * @new_state: pause state
> *
> * Pause dpg mode for VCN block
> */
> -static int vcn_v4_0_5_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx,
> - struct dpg_pause_state *new_state)
> +static int vcn_v4_0_5_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state)
> {
> + struct amdgpu_device *adev = vinst->adev;
> + int inst_idx = vinst->inst;
> uint32_t reg_data = 0;
> int ret_code;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> index a71960d899e38..91b57b86dc58a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> @@ -83,8 +83,8 @@ static int vcn_v5_0_0_set_powergating_state_inst(struct amdgpu_ip_block *ip_bloc
> int i);
> static int vcn_v5_0_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> enum amd_powergating_state state);
> -static int vcn_v5_0_0_pause_dpg_mode(struct amdgpu_device *adev,
> - int inst_idx, struct dpg_pause_state *new_state);
> +static int vcn_v5_0_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state);
> static void vcn_v5_0_0_unified_ring_set_wptr(struct amdgpu_ring *ring);
>
> /**
> @@ -961,7 +961,7 @@ static void vcn_v5_0_0_stop_dpg_mode(struct amdgpu_vcn_inst *vinst)
> struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
> uint32_t tmp;
>
> - vcn_v5_0_0_pause_dpg_mode(adev, inst_idx, &state);
> + vcn_v5_0_0_pause_dpg_mode(vinst, &state);
>
> /* Wait for power status to be 1 */
> SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1,
> @@ -1064,15 +1064,16 @@ static int vcn_v5_0_0_stop(struct amdgpu_vcn_inst *vinst)
> /**
> * vcn_v5_0_0_pause_dpg_mode - VCN pause with dpg mode
> *
> - * @adev: amdgpu_device pointer
> - * @inst_idx: instance number index
> + * @vinst: VCN instance
> * @new_state: pause state
> *
> * Pause dpg mode for VCN block
> */
> -static int vcn_v5_0_0_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx,
> - struct dpg_pause_state *new_state)
> +static int vcn_v5_0_0_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
> + struct dpg_pause_state *new_state)
> {
> + struct amdgpu_device *adev = vinst->adev;
> + int inst_idx = vinst->inst;
> uint32_t reg_data = 0;
> int ret_code;
>
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