[PATCH 1/1] drm/amdgpu: add sdma page queue irq processing for sdma442

[Zhang, Jesse(Jie)]

[AMD Official Use Only - AMD Internal Distribution Only]

Please feel free to add: Reviewed-by and Test-by: "Jesse.zhang at amd.com" ,

-----Original Message-----
From: Ma, Le <Le.Ma at amd.com>
Sent: Tuesday, February 11, 2025 2:40 PM
To: amd-gfx at lists.freedesktop.org
Cc: Zhang, Hawking <Hawking.Zhang at amd.com>; Lazar, Lijo <Lijo.Lazar at amd.com>; Zhang, Jesse(Jie) <Jesse.Zhang at amd.com>; Ma, Le <Le.Ma at amd.com>
Subject: [PATCH 1/1] drm/amdgpu: add sdma page queue irq processing for sdma442

Add the trap irq processing for page queue of sdma442

Signed-off-by: Le Ma <le.ma at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
index 5e0066cd6c51..14acc3b822ec 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
@@ -1683,6 +1683,9 @@ static int sdma_v4_4_2_process_trap_irq(struct amdgpu_device *adev,
        case 0:
                amdgpu_fence_process(&adev->sdma.instance[i].ring);
                break;
+       case 1:
+               amdgpu_fence_process(&adev->sdma.instance[i].page);
+               break;
        default:
                break;
        }
--
2.43.2