[PATCH v2] Documentation/gpu: Add acronyms for some firmware components
Rodrigo Siqueira
siqueira at igalia.com
Wed Feb 19 18:53:45 UTC 2025
Users can check the file "/sys/kernel/debug/dri/0/amdgpu_firmware_info"
to get information on the firmware loaded in the system. This file has
multiple acronyms that are not documented in the glossary. This commit
introduces some missing acronyms to the AMD glossary documentation. The
meaning of each acronym in this commit was extracted from code
documentation available in the following files:
- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
- drivers/gpu/drm/amd/include/amd_shared.h
Changes since v1:
- Expand acronym meanings based on Alex Deucher suggestions.
Cc: Mario Limonciello <mario.limonciello at amd.com>
Signed-off-by: Rodrigo Siqueira <siqueira at igalia.com>
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 45 ++++++++++++++++++--
1 file changed, 42 insertions(+), 3 deletions(-)
diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst
index 00a47ebb0b0f..1e9283e076ba 100644
--- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst
+++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst
@@ -12,6 +12,9 @@ we have a dedicated glossary for Display Core at
The number of CUs that are active on the system. The number of active
CUs may be less than SE * SH * CU depending on the board configuration.
+ CE
+ Constant Engine
+
CP
Command Processor
@@ -68,6 +71,9 @@ we have a dedicated glossary for Display Core at
IB
Indirect Buffer
+ IMU
+ Integrated Management Unit (Power Management support)
+
IP
Intellectual Property blocks
@@ -80,6 +86,12 @@ we have a dedicated glossary for Display Core at
KIQ
Kernel Interface Queue
+ MC
+ Memory Controller
+
+ ME
+ MicroEngine (Graphics)
+
MEC
MicroEngine Compute
@@ -92,6 +104,9 @@ we have a dedicated glossary for Display Core at
MQD
Memory Queue Descriptor
+ PFP
+ Pre-Fetch Parser (Graphics)
+
PPLib
PowerPlay Library - PowerPlay is the power management component.
@@ -99,7 +114,10 @@ we have a dedicated glossary for Display Core at
Platform Security Processor
RLC
- RunList Controller
+ RunList Controller. This name is a remnant of past ages and doesn't have
+ much meaning today. It's a group of general-purpose helper engines for
+ the GFX block. It's involved in GFX power management and SR-IOV, among
+ other things.
SDMA
System DMA
@@ -110,14 +128,35 @@ we have a dedicated glossary for Display Core at
SH
SHader array
- SMU
- System Management Unit
+ SMU/SMC
+ System Management Unit / System Management Controller
+
+ SRLC
+ Save/Restore List Control
+
+ SRLG
+ Save/Restore List GPM_MEM
+
+ SRLS
+ Save/Restore List SRM_MEM
SS
Spread Spectrum
+ TA
+ Trusted Application
+
+ TOC
+ Table of Contents
+
+ UVD
+ Unified Video Decoder
+
VCE
Video Compression Engine
VCN
Video Codec Next
+
+ VPE
+ Video Processing Engine
--
2.48.1
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