[PATCH 12/27] drm/amd/display: wait for outstanding hw updates
Wayne Lin
Wayne.Lin at amd.com
Tue Feb 25 06:35:55 UTC 2025
From: Ausef Yousof <Ausef.Yousof at amd.com>
[why&how]
seeing display corruption as a result of not waiting for certain values
to latch and attempting otg locking/programming before waiting for them,
there is code in place for this but dcn35 does not initialize these
functions.
Cc: Mario Limonciello <mario.limonciello at amd.com>
Cc: Alex Deucher <alexander.deucher at amd.com>
Cc: stable at vger.kernel.org
Reviewed-by: Alvin Lee <alvin.lee2 at amd.com>
Signed-off-by: Ausef Yousof <Ausef.Yousof at amd.com>
Signed-off-by: Wayne Lin <wayne.lin at amd.com>
---
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c | 1 +
drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
index 6a82a865209c..7be72fd88477 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
@@ -128,6 +128,7 @@ static const struct hw_sequencer_funcs dcn35_funcs = {
.enable_plane = dcn20_enable_plane,
.update_dchubp_dpp = dcn20_update_dchubp_dpp,
.post_unlock_reset_opp = dcn20_post_unlock_reset_opp,
+ .wait_for_all_pending_updates = dcn30_wait_for_all_pending_updates
};
static const struct hwseq_private_funcs dcn35_private_funcs = {
diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
index b86fe2b094f8..eb29e852dedb 100644
--- a/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
@@ -493,6 +493,9 @@ static struct timing_generator_funcs dcn35_tg_funcs = {
.set_long_vtotal = optc35_set_long_vtotal,
.is_two_pixels_per_container = optc1_is_two_pixels_per_container,
.read_otg_state = optc31_read_otg_state,
+ .get_optc_double_buffer_pending = optc3_get_optc_double_buffer_pending,
+ .get_pipe_update_pending = optc3_get_pipe_update_pending,
+ .get_otg_double_buffer_pending = optc3_get_otg_update_pending,
};
void dcn35_timing_generator_init(struct optc *optc1)
--
2.37.3
More information about the amd-gfx
mailing list