[PATCH] drm/amdgpu/mes12: enable mes pipe wptr polling

[Xiao, Jack]

[AMD Official Use Only - AMD Internal Distribution Only]

Dropped, it caused a regression.

Regards,
Jack

-----Original Message-----
From: Xiao, Jack <Jack.Xiao at amd.com>
Sent: Friday, January 17, 2025 4:59 PM
To: amd-gfx at lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang at amd.com>; Feng, Kenneth <Kenneth.Feng at amd.com>
Cc: Xiao, Jack <Jack.Xiao at amd.com>
Subject: [PATCH] drm/amdgpu/mes12: enable mes pipe wptr polling

Enable mes pipe wptr polling for gfxoff might result in mes pipe wptr missing.

Signed-off-by: Jack Xiao <Jack.Xiao at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 185f4b55dcca..e516e4598017 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -1256,6 +1256,9 @@ static int mes_v12_0_queue_init(struct amdgpu_device *adev,
        else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
                adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);

+       /* enable wptr polling */
+       WREG32_FIELD15_PREREG(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 1);
+
        soc21_grbm_select(adev, 0, 0, 0, 0);
        mutex_unlock(&adev->srbm_mutex);

--
2.41.0