[PATCH 00/14] DC Patches JANUARY 20, 2025
Zaeem Mohamed
zaeem.mohamed at amd.com
Tue Jan 21 19:39:05 UTC 2025
This DC patchset brings improvements in multiple areas. In summary, we have:
- Fixes on psr_version, dcn35 register address, DCPG OP control sequences
- Imporvements to CR AUX RD interval interpretation, dio link encoder
- Disable PSR-SU on some OLED panels
Cc: Daniel Wheeler <daniel.wheeler at amd.com>
Alex Hung (1):
drm/amd/display: Fix possible NULL dereferencing
Aric Cyr (1):
drm/amd/display: 3.2.318
Austin Zheng (1):
drm/amd/display: Account For OTO Prefetch Bandwidth When Calculating
Urgent Bandwidth
Charlene Liu (1):
drm/amd/display: pass calculated dram_speed_mts to dml2
Dillon Varone (1):
drm/amd/display: Ammend DCPG IP control sequences to align with HW
guidance
George Shen (1):
drm/amd/display: Update CR AUX RD interval interpretation
Hansen Dsouza (1):
drm/amd/display: Add boot option to reduce PHY SSC for HBR3
Peichen Huang (1):
drm/amd/display: refactor dio link encoder assigning
Sung Lee (1):
drm/amd/display: Guard Possible Null Pointer Dereference
Tom Chung (2):
drm/amd/display: Initial psr_version with correct setting
drm/amd/display: Disable PSR-SU on some OLED panel
Wayne Lin (1):
drm/amd/display: Fix potential NULL dereference
Zhikai Zhai (1):
drm/amd/display: Update Cursor request mode to the beginning prefetch
always
loanchen (1):
drm/amd/display: Correct register address in dcn35
.../drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c | 20 ++
.../drm/amd/display/dc/bios/bios_parser2.c | 4 +-
.../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 11 +-
.../gpu/drm/amd/display/dc/core/dc_resource.c | 202 +++++++++++++++++-
drivers/gpu/drm/amd/display/dc/dc.h | 4 +-
.../drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 2 +
.../amd/display/dc/dml/dcn351/dcn351_fpu.c | 1 +
.../src/dml2_core/dml2_core_dcn4_calcs.c | 25 ++-
.../src/dml2_core/dml2_core_shared_types.h | 5 +
.../display/dc/dml2/dml2_translation_helper.c | 9 +-
.../drm/amd/display/dc/dml2/dml2_wrapper.h | 1 +
.../amd/display/dc/hubp/dcn31/dcn31_hubp.c | 2 +-
.../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 22 +-
.../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 14 +-
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 34 +++
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.h | 3 +
.../amd/display/dc/hwss/dcn401/dcn401_init.c | 2 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 3 +
.../link/protocols/link_dp_training_8b_10b.c | 7 +-
.../gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 1 +
21 files changed, 339 insertions(+), 35 deletions(-)
--
2.34.1
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