[PATCH] drm/amd/pm: Use cached data for min/max clocks
Lazar, Lijo
lijo.lazar at amd.com
Mon Jul 14 03:30:58 UTC 2025
Please ignore this. A second version is sent with coding style changes.
Thanks,
Lijo
On 7/12/2025 9:58 AM, Lijo Lazar wrote:
> If dpm tables are already populated on SMU v13.0.6 SOCs, use the cached
> data. Otherwise, fetch values from firmware.
>
> Signed-off-by: Lijo Lazar <lijo.lazar at amd.com>
> ---
> .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 38 +++++++++----------
> 1 file changed, 19 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> index 68624afe7d83..3d092fcd77b2 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> @@ -881,51 +881,51 @@ static int smu_v13_0_6_get_dpm_ultimate_freq(struct smu_context *smu,
> enum smu_clk_type clk_type,
> uint32_t *min, uint32_t *max)
> {
> + struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
> struct smu_table_context *smu_table = &smu->smu_table;
> + struct smu_13_0_dpm_table *dpm_table = NULL;
> struct PPTable_t *pptable =
> (struct PPTable_t *)smu_table->driver_pptable;
> - uint32_t clock_limit = 0, param;
> + uint32_t min_clk = 0, max_clk = 0, param;
> int ret = 0, clk_id = 0;
>
> - if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) {
> + /* Use dpm tables, if data is already fetched */
> + if (pptable->Init) {
> switch (clk_type) {
> case SMU_MCLK:
> case SMU_UCLK:
> - if (pptable->Init)
> - clock_limit = pptable->UclkFrequencyTable[0];
> + dpm_table = &dpm_context->dpm_tables.uclk_table;
> break;
> case SMU_GFXCLK:
> case SMU_SCLK:
> - if (pptable->Init)
> - clock_limit = pptable->MinGfxclkFrequency;
> + dpm_table = &dpm_context->dpm_tables.gfx_table;
> break;
> case SMU_SOCCLK:
> - if (pptable->Init)
> - clock_limit = pptable->SocclkFrequencyTable[0];
> + dpm_table = &dpm_context->dpm_tables.soc_table;
> break;
> case SMU_FCLK:
> - if (pptable->Init)
> - clock_limit = pptable->FclkFrequencyTable[0];
> + dpm_table = &dpm_context->dpm_tables.fclk_table;
> break;
> case SMU_VCLK:
> - if (pptable->Init)
> - clock_limit = pptable->VclkFrequencyTable[0];
> + dpm_table = &dpm_context->dpm_tables.vclk_table;
> break;
> case SMU_DCLK:
> - if (pptable->Init)
> - clock_limit = pptable->DclkFrequencyTable[0];
> + dpm_table = &dpm_context->dpm_tables.dclk_table;
> break;
> default:
> - break;
> + return -EINVAL;
> }
>
> - if (min)
> - *min = clock_limit;
> + min_clk = dpm_table->min;
> + max_clk = dpm_table->max;
>
> + if (min)
> + *min = min_clk;
> if (max)
> - *max = clock_limit;
> + *max = max_clk;
>
> - return 0;
> + if (min_clk && max_clk)
> + return 0;
> }
>
> if (!(clk_type == SMU_GFXCLK || clk_type == SMU_SCLK)) {
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