[PATCH 22/25] drm/amd/display: Fix dmub_cmd header alignment
IVAN.LIPSKI at amd.com
IVAN.LIPSKI at amd.com
Tue Jul 22 22:44:31 UTC 2025
From: Ovidiu Bunea <ovidiu.bunea at amd.com>
[why & how]
Header misalignment in struct dmub_cmd_replay_copy_settings_data and
struct dmub_alpm_auxless_data causes incorrect data read between driver
and dmub.
Fix the misalignment and ensure that everything is aligned to 4-byte
boundaries.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea at amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski at amd.com>
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 20 +++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index a89bf08ffd37..dcae768c2cf4 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -4048,6 +4048,10 @@ struct dmub_alpm_auxless_data {
uint16_t lfps_t1_t2_override_us;
short lfps_t1_t2_offset_us;
uint8_t lttpr_count;
+ /*
+ * Padding to align structure to 4 byte boundary.
+ */
+ uint8_t pad[1];
};
/**
@@ -4080,14 +4084,6 @@ struct dmub_cmd_replay_copy_settings_data {
* DIG BE HW instance.
*/
uint8_t digbe_inst;
- /**
- * @hpo_stream_enc_inst: HPO stream encoder instance
- */
- uint8_t hpo_stream_enc_inst;
- /**
- * @hpo_link_enc_inst: HPO link encoder instance
- */
- uint8_t hpo_link_enc_inst;
/**
* AUX HW instance.
*/
@@ -4132,6 +4128,14 @@ struct dmub_cmd_replay_copy_settings_data {
* Use for AUX-less ALPM LFPS wake operation
*/
struct dmub_alpm_auxless_data auxless_alpm_data;
+ /**
+ * @hpo_stream_enc_inst: HPO stream encoder instance
+ */
+ uint8_t hpo_stream_enc_inst;
+ /**
+ * @hpo_link_enc_inst: HPO link encoder instance
+ */
+ uint8_t hpo_link_enc_inst;
/**
* @pad: Align structure to 4 byte boundary.
*/
--
2.43.0
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