[PATCH] drm/amdgpu: Fix SDMA UTC_L1 handling during start/stop sequences

[Philip Yang]

On 2025-06-16 07:43, Jesse Zhang wrote:
> This commit makes two key fixes to SDMA v4.4.2 handling:
>
> 1. disable UTC_L1 in sdma_cntl register when stopping SDMA engines
>     by reading the current value before modifying UTC_L1_ENABLE bit.
>
> 2. Ensure UTC_L1_ENABLE is consistently managed by:
>     - Adding the missing register write when enabling UTC_L1 during start
>     - Keeping UTC_L1 enabled by default as per hardware requirements
>
> Fixes the commit 7f03b1d14d51 ("drm/amdgpu:
> Remove sdma halt/unhalt during frontdoor load") by maintaining proper
> SDMA controller state during initialization sequences.
>
> Suggested-by: Jonathan Kim <jonathan.kim at amd.com>
> Signed-off-by: Jesse Zhang <Jesse.Zhang at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> index e6af50c947a1..1f6a8944b1ea 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> @@ -492,7 +492,7 @@ static void sdma_v4_4_2_inst_gfx_stop(struct amdgpu_device *adev,
>   {
>   	struct amdgpu_ring *sdma[AMDGPU_MAX_SDMA_INSTANCES];
>   	u32 doorbell_offset, doorbell;
> -	u32 rb_cntl, ib_cntl;
> +	u32 rb_cntl, ib_cntl, sdma_cntl;
>   	int i;
>   
>   	for_each_inst(i, inst_mask) {
> @@ -504,6 +504,8 @@ static void sdma_v4_4_2_inst_gfx_stop(struct amdgpu_device *adev,
>   		ib_cntl = RREG32_SDMA(i, regSDMA_GFX_IB_CNTL);
>   		ib_cntl = REG_SET_FIELD(ib_cntl, SDMA_GFX_IB_CNTL, IB_ENABLE, 0);
>   		WREG32_SDMA(i, regSDMA_GFX_IB_CNTL, ib_cntl);

seems using random value sdma_cntl to init, probably you need add this?

sdma_cntl = RREG32_SDMA(i, SDMA_CNTL);

Regards,

Philip

> +		sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, UTC_L1_ENABLE, 0);
> +		WREG32_SDMA(i, regSDMA_CNTL, sdma_cntl);
>   
>   		if (sdma[i]->use_doorbell) {
>   			doorbell = RREG32_SDMA(i, regSDMA_GFX_DOORBELL);
> @@ -997,6 +999,7 @@ static int sdma_v4_4_2_inst_start(struct amdgpu_device *adev,
>   		/* set utc l1 enable flag always to 1 */
>   		temp = RREG32_SDMA(i, regSDMA_CNTL);
>   		temp = REG_SET_FIELD(temp, SDMA_CNTL, UTC_L1_ENABLE, 1);
> +		WREG32_SDMA(i, regSDMA_CNTL, temp);
>   
>   		if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) < IP_VERSION(4, 4, 5)) {
>   			/* enable context empty interrupt during initialization */