[PATCH 2/2] drm/amdgpu: Fix core reset sequence for JPEG5_0_1

[Liu, Leo]

[AMD Official Use Only - AMD Internal Distribution Only]

The series is:
Reviewed-by: Leo Liu <leo.liu at amd.com>

> -----Original Message-----
> From: Sundararaju, Sathishkumar <Sathishkumar.Sundararaju at amd.com>
> Sent: February 26, 2025 11:51 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Liu, Leo <Leo.Liu at amd.com>; Sundararaju, Sathishkumar
> <Sathishkumar.Sundararaju at amd.com>
> Subject: [PATCH 2/2] drm/amdgpu: Fix core reset sequence for JPEG5_0_1
>
> For cores 1 through 9 repair the core reset sequence by adjusting offsets to
> access the expected registers.
>
> Signed-off-by: Sathishkumar S <sathishkumar.sundararaju at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c | 14 +++++---------
>  1 file changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> index 6b8ef8e8c0eb..220f3af01748 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> @@ -669,24 +669,20 @@ static void jpeg_v5_0_1_core_stall_reset(struct
> amdgpu_ring *ring)
>       WREG32_SOC15_OFFSET(JPEG, jpeg_inst,
>                           regUVD_JMI0_UVD_JMI_CLIENT_STALL,
>                           reg_offset, 0x1F);
> -     SOC15_WAIT_ON_RREG(JPEG, jpeg_inst,
> -                        regUVD_JMI0_UVD_JMI_CLIENT_CLEAN_STATUS,
> -                        0x1F, 0x1F);
> +     SOC15_WAIT_ON_RREG_OFFSET(JPEG, jpeg_inst,
> +
> regUVD_JMI0_UVD_JMI_CLIENT_CLEAN_STATUS,
> +                               reg_offset, 0x1F, 0x1F);
>       WREG32_SOC15_OFFSET(JPEG, jpeg_inst,
>                           regUVD_JMI0_JPEG_LMI_DROP,
>                           reg_offset, 0x1F);
> -     WREG32_SOC15_OFFSET(JPEG, jpeg_inst,
> -                         regJPEG_CORE_RST_CTRL,
> -                         reg_offset, 1 << ring->pipe);
> +     WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CORE_RST_CTRL, 1 << ring-
> >pipe);
>       WREG32_SOC15_OFFSET(JPEG, jpeg_inst,
>                           regUVD_JMI0_UVD_JMI_CLIENT_STALL,
>                           reg_offset, 0x00);
>       WREG32_SOC15_OFFSET(JPEG, jpeg_inst,
>                           regUVD_JMI0_JPEG_LMI_DROP,
>                           reg_offset, 0x00);
> -     WREG32_SOC15_OFFSET(JPEG, jpeg_inst,
> -                         regJPEG_CORE_RST_CTRL,
> -                         reg_offset, 0x00);
> +     WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CORE_RST_CTRL, 0x00);
>  }
>
>  static int jpeg_v5_0_1_ring_reset(struct amdgpu_ring *ring, unsigned int
> vmid)
> --
> 2.25.1