[PATCH v3 2/4] drm/amdgpu: add defines for pin_offsets in DCE8

[Alex Deucher]

Applied.  Thanks.

On Wed, Mar 5, 2025 at 9:08 PM Alexandre Demers
<alexandre.f.demers at gmail.com> wrote:
>
> Define pin_offsets values in the same way it is done in DCE8
>
> Signed-off-by: Alexandre Demers <alexandre.f.demers at gmail.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/cikd.h     |  9 +++++++++
>  drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 14 +++++++-------
>  2 files changed, 16 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/cikd.h b/drivers/gpu/drm/amd/amdgpu/cikd.h
> index 06088d52d81c..279288365940 100644
> --- a/drivers/gpu/drm/amd/amdgpu/cikd.h
> +++ b/drivers/gpu/drm/amd/amdgpu/cikd.h
> @@ -51,6 +51,15 @@
>  #define HPD4_REGISTER_OFFSET                 (0x1813 - 0x1807)
>  #define HPD5_REGISTER_OFFSET                 (0x1816 - 0x1807)
>
> +/* audio endpt instance offsets */
> +#define AUD0_REGISTER_OFFSET                 (0x1780 - 0x1780)
> +#define AUD1_REGISTER_OFFSET                 (0x1786 - 0x1780)
> +#define AUD2_REGISTER_OFFSET                 (0x178c - 0x1780)
> +#define AUD3_REGISTER_OFFSET                 (0x1792 - 0x1780)
> +#define AUD4_REGISTER_OFFSET                 (0x1798 - 0x1780)
> +#define AUD5_REGISTER_OFFSET                 (0x179d - 0x1780)
> +#define AUD6_REGISTER_OFFSET                 (0x17a4 - 0x1780)
> +
>  #define BONAIRE_GB_ADDR_CONFIG_GOLDEN        0x12010001
>  #define HAWAII_GB_ADDR_CONFIG_GOLDEN         0x12011003
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> index 04b79ff87f75..5e657b43a159 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> @@ -1395,13 +1395,13 @@ static void dce_v8_0_audio_enable(struct amdgpu_device *adev,
>  }
>
>  static const u32 pin_offsets[7] = {
> -       (0x1780 - 0x1780),
> -       (0x1786 - 0x1780),
> -       (0x178c - 0x1780),
> -       (0x1792 - 0x1780),
> -       (0x1798 - 0x1780),
> -       (0x179d - 0x1780),
> -       (0x17a4 - 0x1780),
> +       AUD0_REGISTER_OFFSET,
> +       AUD1_REGISTER_OFFSET,
> +       AUD2_REGISTER_OFFSET,
> +       AUD3_REGISTER_OFFSET,
> +       AUD4_REGISTER_OFFSET,
> +       AUD5_REGISTER_OFFSET,
> +       AUD6_REGISTER_OFFSET,
>  };
>
>  static int dce_v8_0_audio_init(struct amdgpu_device *adev)
> --
> 2.48.1
>