[PATCH 1/2] drm/amdgpu/mes: optimize compute loop handling

[Liu, Shaoyun]

[AMD Official Use Only - AMD Internal Distribution Only]

Reviewed-by: Shaoyun.liu <Shaoyun.liu at amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Wednesday, March 19, 2025 12:24 PM
To: amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>
Subject: [PATCH 1/2] drm/amdgpu/mes: optimize compute loop handling

Break when we get to the end of the supported pipes rather than continuing the loop.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 6f5e272d7ded3..920cd1c1eacb6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -111,7 +111,7 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
        for (i = 0; i < AMDGPU_MES_MAX_COMPUTE_PIPES; i++) {
                /* use only 1st MEC pipes */
                if (i >= adev->gfx.mec.num_pipe_per_mec)
-                       continue;
+                       break;
                adev->mes.compute_hqd_mask[i] = 0xc;
        }

--
2.48.1