[PATCH 2/4] drm/amdgpu/mes: enable compute pipes across all MEC

[Alex Deucher]

On Thu, Mar 20, 2025 at 7:15 AM Lazar, Lijo <lijo.lazar at amd.com> wrote:
>
>
>
> On 3/20/2025 12:38 AM, Alex Deucher wrote:
> > Enable pipes on both MECs for MES.
> >
> > Fixes: 745f46b6a99f ("drm/amdgpu: enable mes v12 self test")
> > Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 3 +--
> >  1 file changed, 1 insertion(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> > index 10f14bf925778..ac9b1708e20d8 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> > @@ -130,8 +130,7 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
> >       }
> >
> >       for (i = 0; i < AMDGPU_MES_MAX_COMPUTE_PIPES; i++) {
> > -             /* use only 1st MEC pipes */
> > -             if (i >= adev->gfx.mec.num_pipe_per_mec)
> > +             if (i >= (adev->gfx.mec.num_pipe_per_mec * adev->gfx.mec.num_mec))
>
> Same comment as in patch 1.

This keeps the array access bounded.

Alex

>
> Thanks,
> Lijo
>
> >                       break;
> >               adev->mes.compute_hqd_mask[i] = 0xc;
> >       }
>