[PATCH 3/3] drm/amdgpu/discovery: optionally use fw based ip discovery

[Alex Deucher]

On Fri, Mar 14, 2025 at 6:03 AM Flora Cui <flora.cui at amd.com> wrote:
>
> From: Alex Deucher <alexander.deucher at amd.com>
>
> On chips without native IP discovery support, use the fw binary
> if available, otherwise we can continue without it.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 38 +++++++++++++++----
>  1 file changed, 30 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> index fff438baf64b..cf286fde18d5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> @@ -2536,6 +2536,36 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
>  {
>         int r;
>
> +       switch (adev->asic_type) {
> +       case CHIP_VEGA10:
> +       case CHIP_VEGA12:
> +       case CHIP_RAVEN:
> +       case CHIP_VEGA20:
> +       case CHIP_ARCTURUS:
> +       case CHIP_ALDEBARAN:
> +               /* this is not fatal.  We have a fallback below
> +                * if the new firmwares are not present.

Update this comment to add that some of this will be overridden below
to keep things consistent with the current behavior.  With that fixed,
the series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> +                */
> +               r = amdgpu_discovery_reg_base_init(adev);
> +               if (!r) {
> +                       amdgpu_discovery_harvest_ip(adev);
> +                       amdgpu_discovery_get_gfx_info(adev);
> +                       amdgpu_discovery_get_mall_info(adev);
> +                       amdgpu_discovery_get_vcn_info(adev);
> +               }
> +               break;
> +       default:
> +               r = amdgpu_discovery_reg_base_init(adev);
> +               if (r)
> +                       return -EINVAL;
> +
> +               amdgpu_discovery_harvest_ip(adev);
> +               amdgpu_discovery_get_gfx_info(adev);
> +               amdgpu_discovery_get_mall_info(adev);
> +               amdgpu_discovery_get_vcn_info(adev);
> +               break;
> +       }
> +
>         switch (adev->asic_type) {
>         case CHIP_VEGA10:
>                 vega10_reg_base_init(adev);
> @@ -2700,14 +2730,6 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
>                 adev->ip_versions[XGMI_HWIP][0] = IP_VERSION(6, 1, 0);
>                 break;
>         default:
> -               r = amdgpu_discovery_reg_base_init(adev);
> -               if (r)
> -                       return -EINVAL;
> -
> -               amdgpu_discovery_harvest_ip(adev);
> -               amdgpu_discovery_get_gfx_info(adev);
> -               amdgpu_discovery_get_mall_info(adev);
> -               amdgpu_discovery_get_vcn_info(adev);
>                 break;
>         }
>
> --
> 2.43.0
>