[PATCH 1/2] drm/amdgpu: add UAPI to query if user queues are supported
Alex Deucher
alexander.deucher at amd.com
Mon Mar 24 20:33:27 UTC 2025
Add an INFO query to check if user queues are supported.
v2: switch to a mask of IPs (Marek)
v3: move to drm_amdgpu_info_device (Marek)
Cc: marek.olsak at amd.com
Cc: prike.liang at amd.com
Cc: sunil.khatri at amd.com
Cc: yogesh.mohanmarimuthu at amd.com
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 7 +++++++
include/uapi/drm/amdgpu_drm.h | 3 +++
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 3b7dfd56ccd0e..0ba3ef1e4a068 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -1009,6 +1009,13 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
}
}
+ if (adev->userq_funcs[AMDGPU_HW_IP_GFX])
+ dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_GFX);
+ if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE])
+ dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_COMPUTE);
+ if (adev->userq_funcs[AMDGPU_HW_IP_DMA])
+ dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_DMA);
+
ret = copy_to_user(out, dev_info,
min((size_t)size, sizeof(*dev_info))) ? -EFAULT : 0;
kfree(dev_info);
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 5dbd9037afe75..ef97c0d78b8a0 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -1453,6 +1453,9 @@ struct drm_amdgpu_info_device {
__u32 csa_size;
/* context save area base virtual alignment for gfx11 */
__u32 csa_alignment;
+ /* Userq IP mask (1 << AMDGPU_HW_IP_*) */
+ __u32 userq_ip_mask;
+ __u32 pad;
};
struct drm_amdgpu_info_hw_ip {
--
2.49.0
More information about the amd-gfx
mailing list