[PATCH 2/5] drm/amdgpu: rework gfx9 queue reset

[Christian König]

On 5/2/25 18:43, Alex Deucher wrote:
>> @@ -7555,7 +7545,7 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = {
>>                 20 + /* gfx_v9_0_ring_emit_gds_switch */
>>                 7 + /* gfx_v9_0_ring_emit_hdp_flush */
>>                 5 + /* hdp invalidate */
>> -               7 + /* gfx_v9_0_ring_emit_pipeline_sync */
>> +               7 + 7 + 5 + 7 +  /* PIPELINE_SYNC */
>>                 SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +
>>                 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +
>>                 8 + 8 + 8 + /* gfx_v9_0_ring_emit_fence x3 for user fence, vm fence */
>> @@ -7577,7 +7567,6 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = {
>>         .emit_wreg = gfx_v9_0_ring_emit_wreg,
>>         .emit_reg_wait = gfx_v9_0_ring_emit_reg_wait,
>>         .emit_reg_write_reg_wait = gfx_v9_0_ring_emit_reg_write_reg_wait,
>> -       .soft_recovery = gfx_v9_0_ring_soft_recovery,
> 
> I think we should keep soft recovery for compute.  For compute, it
> should do what we want.

I would rather like to avoid that. As far as I can see the soft recovery is not guaranteed to work for compute queues when the VMID filter is used.

Instead I've worked on a patch to make sure that only one application at a time can use each queue. Should be unproblematic for compute since we have enough queues and use them round robin anyway.

Christian.


> 
> Alex