[PATCH] drm/amdgpu: fix incorrect MALL size for GFX1151

[Alex Deucher]

On Thu, May 8, 2025 at 3:31 AM Tim Huang <tim.huang at amd.com> wrote:
>
> On GFX1151, the reported MALL cache size reflects only
> half of its actual size; this adjustment corrects the discrepancy.
>
> Signed-off-by: Tim Huang <tim.huang at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> index 917d894a1316..72211409227b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> @@ -748,6 +748,18 @@ static int gmc_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
>         adev->gmc.vram_type = vram_type;
>         adev->gmc.vram_vendor = vram_vendor;
>
> +       /* The mall_size is already calculated as mall_size_per_umc * num_umc.
> +        * However, for gfx1151, which features a 2-to-1 UMC mapping,
> +        * the result must be multiplied by 2 to determine the actual mall size.
> +        */
> +       switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
> +       case IP_VERSION(11, 5, 1):
> +               adev->gmc.mall_size *= 2;
> +               break;
> +       default:
> +               break;
> +       }
> +
>         switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
>         case IP_VERSION(11, 0, 0):
>         case IP_VERSION(11, 0, 1):
> --
> 2.43.0
>