[PATCH] drm/amdgpu: Add GFX 9.5.0 support for per-queue/pipe reset

Lazar, Lijo lijo.lazar at amd.com
Fri May 9 11:10:08 UTC 2025



On 5/9/2025 3:04 PM, Jesse.Zhang wrote:
> From: Asad Kamal <asad.kamal at amd.com>
> 
> This patch enables per-queue and per-pipe reset functionality for
> GFX IP v9.5.0 when using MEC firmware version 21 (0x15) or later.
> 
> Changes include:
> 1. Added IP_VERSION(9,5,0) case in gfx_v9_4_3_sw_init() to enable
>    per-queue and per-pipe reset flags when MEC FW >= 21
> 2. Extended pipe reset support check in gfx_v9_4_3_pipe_reset_support()
>    to include GFX 9.5.0 with MEC FW >= 0x15 requirement
> 
> Signed-off-by: Asad Kamal <asad.kamal at amd.com>
> Signed-off-by: Jesse Zhang <jesse.zhang at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> index 9db2bde5c59d..a832639c07b8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> @@ -1153,6 +1153,12 @@ static int gfx_v9_4_3_sw_init(struct amdgpu_ip_block *ip_block)
>  			adev->gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_PIPE;
>  		}
>  		break;
> +	case IP_VERSION(9, 5, 0):
> +		if (adev->gfx.mec_fw_version >= 21) {
> +			adev->gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> +			adev->gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_PIPE;
> +		}
> +		break;
>  	default:
>  		break;
>  	}
> @@ -3453,8 +3459,10 @@ static int gfx_v9_4_3_unmap_done(struct amdgpu_device *adev, uint32_t me,
>  static bool gfx_v9_4_3_pipe_reset_support(struct amdgpu_device *adev)
>  {
>  	/*TODO: Need check gfx9.4.4 mec fw whether supports pipe reset as well.*/
> -	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) &&
> -			adev->gfx.mec_fw_version >= 0x0000009b)
> +	if ((amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) &&
> +			adev->gfx.mec_fw_version >= 0x0000009b) ||
> +			(amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 5, 0) &&
> +			adev->gfx.mec_fw_version >= 0x15))

I think this can be replaced with !!(adev->gfx.compute_supported_reset &
AMDGPU_RESET_TYPE_PER_PIPE).

Thanks,
Lijo

>  		return true;
>  	else
>  		dev_warn_once(adev->dev, "Please use the latest MEC version to see whether support pipe reset\n");



More information about the amd-gfx mailing list