[PATCH v1 0/8] drm/amdgpu: read back register after written

Alex Deucher alexdeucher at gmail.com
Wed May 14 18:05:50 UTC 2025


On Wed, May 14, 2025 at 1:33 PM David (Ming Qiang) Wu <David.Wu3 at amd.com> wrote:
>
> Similar to the changes made for VCN v4.0.5, the addition of register
> read-back support in other VCN versions is intended to prevent potential
> race conditions, even though such issues have not been observed yet.
> This change ensures consistency across different VCN variants and helps
> avoid similar issues. The overhead introduced is negligible.
>

Just for some background this is standard PCI MMIO behavior.  If you
want to guarantee that the writes hit the hardware, you need to do a
read to post the writes.  You only need to do it for cases where you
care about the writes posting before the next operation.

Alex


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