[PATCH] drm/amd/pm: Use external link order for xgmi data

[Wang, Yang(Kevin)]

[AMD Official Use Only - AMD Internal Distribution Only]

"-1" is meaningless, it is recommended to use -EINVAL or -EOPNOTSUPP.

Acked-by: Yang Wang <kevinyang.wang at amd.com>

Best Regards,
Kevin

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Lijo Lazar
Sent: Monday, May 19, 2025 19:02
To: amd-gfx at lists.freedesktop.org
Cc: Zhang, Hawking <Hawking.Zhang at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Kamal, Asad <Asad.Kamal at amd.com>
Subject: [PATCH] drm/amd/pm: Use external link order for xgmi data

xgmi_port_num interface reports external link number for port number. To be consistent, use the external link number for reporting other XGMI link data also.

Signed-off-by: Lijo Lazar <lijo.lazar at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c        | 17 +++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h        |  1 +
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c   |  9 ++++++---
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c    | 13 ++++++++-----
 4 files changed, 32 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index f51ef4cf16e0..b3006ca7fd28 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -294,6 +294,23 @@ static const struct amdgpu_pcs_ras_field xgmi3x16_pcs_ras_fields[] = {
         SOC15_REG_FIELD(PCS_XGMI3X16_PCS_ERROR_STATUS, RxCMDPktErr)},  };

+int amdgpu_xgmi_get_ext_link(struct amdgpu_device *adev, int link_num)
+{
+       int link_map_6_4_x[8] = { 0, 3, 1, 2, 7, 6, 4, 5 };
+
+       switch (amdgpu_ip_version(adev, XGMI_HWIP, 0)) {
+       case IP_VERSION(6, 4, 0):
+       case IP_VERSION(6, 4, 1):
+               if (link_num < ARRAY_SIZE(link_map_6_4_x))
+                       return link_map_6_4_x[link_num];
+               break;
+       default:
+               return -1;
+       }
+
+       return -1;
+}
+
 static u32 xgmi_v6_4_get_link_status(struct amdgpu_device *adev, int global_link_num)  {
        const u32 smn_xgmi_6_4_pcs_state_hist1[2] = { 0x11a00070, 0x11b00070 }; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
index 32dabba4062f..f994be985f42 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
@@ -125,6 +125,7 @@ int amdgpu_xgmi_request_nps_change(struct amdgpu_device *adev,
                                   int req_nps_mode);
 int amdgpu_get_xgmi_link_status(struct amdgpu_device *adev,
                                int global_link_num);
+int amdgpu_xgmi_get_ext_link(struct amdgpu_device *adev, int link_num);

 void amdgpu_xgmi_early_init(struct amdgpu_device *adev);  uint32_t amdgpu_xgmi_get_max_bandwidth(struct amdgpu_device *adev); diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
index ac172b21f803..69f92bd35bf2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
@@ -472,13 +472,16 @@ ssize_t smu_v13_0_12_get_gpu_metrics(struct smu_context *smu, void **table)
        gpu_metrics->mem_activity_acc = SMUQ10_ROUND(metrics->DramBandwidthUtilizationAcc);

        for (i = 0; i < NUM_XGMI_LINKS; i++) {
-               gpu_metrics->xgmi_read_data_acc[i] =
+               j = amdgpu_xgmi_get_ext_link(adev, i);
+               if (j < 0 || j >= NUM_XGMI_LINKS)
+                       continue;
+               gpu_metrics->xgmi_read_data_acc[j] =
                        SMUQ10_ROUND(metrics->XgmiReadDataSizeAcc[i]);
-               gpu_metrics->xgmi_write_data_acc[i] =
+               gpu_metrics->xgmi_write_data_acc[j] =
                        SMUQ10_ROUND(metrics->XgmiWriteDataSizeAcc[i]);
                ret = amdgpu_get_xgmi_link_status(adev, i);
                if (ret >= 0)
-                       gpu_metrics->xgmi_link_status[i] = ret;
+                       gpu_metrics->xgmi_link_status[j] = ret;
        }

        gpu_metrics->num_partition = adev->xcp_mgr->num_xcps; diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 645c2bff3e5f..179b1b16edd1 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -2819,13 +2819,16 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table
                SMUQ10_ROUND(GET_METRIC_FIELD(DramBandwidthUtilizationAcc, version));

        for (i = 0; i < NUM_XGMI_LINKS; i++) {
-               gpu_metrics->xgmi_read_data_acc[i] =
-                       SMUQ10_ROUND(GET_METRIC_FIELD(XgmiReadDataSizeAcc, version)[i]);
-               gpu_metrics->xgmi_write_data_acc[i] =
-                       SMUQ10_ROUND(GET_METRIC_FIELD(XgmiWriteDataSizeAcc, version)[i]);
+               j = amdgpu_xgmi_get_ext_link(adev, i);
+               if (j < 0 || j >= NUM_XGMI_LINKS)
+                       continue;
+               gpu_metrics->xgmi_read_data_acc[j] = SMUQ10_ROUND(
+                       GET_METRIC_FIELD(XgmiReadDataSizeAcc, version)[i]);
+               gpu_metrics->xgmi_write_data_acc[j] = SMUQ10_ROUND(
+                       GET_METRIC_FIELD(XgmiWriteDataSizeAcc, version)[i]);
                ret = amdgpu_get_xgmi_link_status(adev, i);
                if (ret >= 0)
-                       gpu_metrics->xgmi_link_status[i] = ret;
+                       gpu_metrics->xgmi_link_status[j] = ret;
        }

        gpu_metrics->num_partition = adev->xcp_mgr->num_xcps;
--
2.25.1