<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> <style type="text/css" style="display:none;"></style> </head> <body dir="ltr"> <div id="divtagdefaultwrapper" style="font-size:12pt;color:#000000;background-color:#FFFFFF;font-family:Calibri,Arial,Helvetica,sans-serif;"> I agree it's a bit dodgy that's why I added a version number. If we do add this I reckon we can just zero out removed fields and/or append to the end anything new. Almost none of the members of the structure are actually used in the kernel though (which I found interesting). Currently I use a few fields in the debugger tool to sanity check bank selection. I suppose some of the other fields could be used in scriptware when debugging. I thought about using the other amdgpu debug routines but they're text based and I wanted a simple binary file. At least this is added/removed automagically so driver load/unload should be fine. Tom <div style="color: rgb(0, 0, 0);"> <div> <hr tabindex="-1" style="display:inline-block; width:98%"> <div id="x_divRplyFwdMsg" dir="ltr">From: Christian König <deathsimple@vodafone.de> Sent: Tuesday, June 28, 2016 11:11 To: Tom St Denis; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: Re: [PATCH 2/3] drm/amd/amdgpu: Add gca config debug entry <div> </div> </div> </div> <div class="PlainText">Am 28.06.2016 um 16:43 schrieb Tom St Denis: > A binary entry that lists GCA configuration data (and can be > read by umr). > > Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Uff exporting the internal structures of the driver through a binary debugfs entry... We don't need to be backward compatible because it is debugfs, but I don't think that is such a good idea. Regards, Christian. > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 70 ++++++++++++++++++++++++++++++ > 1 file changed, 70 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index 4598093ad50b..7f08ac02f9de 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -2464,6 +2464,68 @@ static ssize_t amdgpu_debugfs_regs_smc_write(struct file *f, const char __user * > return result; > } > > +static ssize_t amdgpu_debugfs_gca_config_read(struct file *f, char __user *buf, > + size_t size, loff_t *pos) > +{ > + struct amdgpu_device *adev = f->f_inode->i_private; > + ssize_t result = 0; > + int r; > + uint32_t *config, no_regs = 0; > + > + if (size & 0x3 || *pos & 0x3) > + return -EINVAL; > + > + config = vmalloc(256*sizeof(*config)); > + if (!config) > + return -ENOMEM; > + > + /* version, increment each time something is added */ > + config[no_regs++] = 0; > + config[no_regs++] = adev->gfx.config.max_shader_engines; > + config[no_regs++] = adev->gfx.config.max_tile_pipes; > + config[no_regs++] = adev->gfx.config.max_cu_per_sh; > + config[no_regs++] = adev->gfx.config.max_sh_per_se; > + config[no_regs++] = adev->gfx.config.max_backends_per_se; > + config[no_regs++] = adev->gfx.config.max_texture_channel_caches; > + config[no_regs++] = adev->gfx.config.max_gprs; > + config[no_regs++] = adev->gfx.config.max_gs_threads; > + config[no_regs++] = adev->gfx.config.max_hw_contexts; > + config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_frontend; > + config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_backend; > + config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size; > + config[no_regs++] = adev->gfx.config.sc_earlyz_tile_fifo_size; > + config[no_regs++] = adev->gfx.config.num_tile_pipes; > + config[no_regs++] = adev->gfx.config.backend_enable_mask; > + config[no_regs++] = adev->gfx.config.mem_max_burst_length_bytes; > + config[no_regs++] = adev->gfx.config.mem_row_size_in_kb; > + config[no_regs++] = adev->gfx.config.shader_engine_tile_size; > + config[no_regs++] = adev->gfx.config.num_gpus; > + config[no_regs++] = adev->gfx.config.multi_gpu_tile_size; > + config[no_regs++] = adev->gfx.config.mc_arb_ramcfg; > + config[no_regs++] = adev->gfx.config.gb_addr_config; > + config[no_regs++] = adev->gfx.config.num_rbs; > + > + while (size && (*pos < no_regs*4)) { > + uint32_t value; > + > + value = config[*pos >> 2]; > + r = put_user(value, (uint32_t *)buf); > + if (r) { > + vfree(config); > + return r; > + } > + > + result += 4; > + buf += 4; > + *pos += 4; > + size -= 4; > + } > + > + vfree(config); > + return result; > +} > + > + > static const struct file_operations amdgpu_debugfs_regs_fops = { > .owner = THIS_MODULE, > .read = amdgpu_debugfs_regs_read, > @@ -2489,11 +2551,18 @@ static const struct file_operations amdgpu_debugfs_regs_smc_fops = { > .llseek = default_llseek > }; > > +static const struct file_operations amdgpu_debugfs_gca_config_fops = { > + .owner = THIS_MODULE, > + .read = amdgpu_debugfs_gca_config_read, > + .llseek = default_llseek > +}; > + > static const struct file_operations *debugfs_regs[] = { > &amdgpu_debugfs_regs_fops, > &amdgpu_debugfs_regs_didt_fops, > &amdgpu_debugfs_regs_pcie_fops, > &amdgpu_debugfs_regs_smc_fops, > + &amdgpu_debugfs_gca_config_fops, > }; > > static const char *debugfs_regs_names[] = { > @@ -2501,6 +2570,7 @@ static const char *debugfs_regs_names[] = { > "amdgpu_regs_didt", > "amdgpu_regs_pcie", > "amdgpu_regs_smc", > + "amdgpu_gca_config", > }; > > static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev) </div> </div> </div> </body> </html>