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make sense<br>
<br>
Sent from my Huawei Mobile<br>
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-------- 原始邮件 --------<br>
主题:Re: [PATCH 1/3] drm/amdgpu: check flush fence context instead of same ring v2<br>
发件人:"StDenis, Tom" <br>
收件人:"Zhou, David(ChunMing)" ,Christian K鰊ig ,amd-gfx@lists.freedesktop.org<br>
抄送:<br>
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<p>Just to add to that I had no more GPU hangs with those patches on my CZ system.</p>
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<p>Tom</p>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of zhoucm1 <david1.zhou@amd.com><br>
<b>Sent:</b> Tuesday, July 12, 2016 21:52<br>
<b>To:</b> Christian König; amd-gfx@lists.freedesktop.org<br>
<b>Subject:</b> Re: [PATCH 1/3] drm/amdgpu: check flush fence context instead of same ring v2</font>
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<br>
On 2016年07月12日 20:05, Christian König wrote:<br>
> From: Christian König <christian.koenig@amd.com><br>
><br>
> Otherwise we can run into the following situation:<br>
><br>
> 1. Process A grabs ID 1 for ring 0.<br>
> 2. Process B grabs ID 1 for ring 0.<br>
> 3. Process A grabs ID 1 for ring 1.<br>
> 4. Process A tries to reuse ID1 for ring 0 but things he doesn't need to flush.<br>
><br>
> v2: check the context of the flush fence instead of messing with the owner field.<br>
><br>
> Signed-off-by: Christian König <christian.koenig@amd.com><br>
<br>
The set is Reviewed-by: Chunming Zhou <david1.zhou@amd.com><br>
<br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 ++++++---<br>
> 1 file changed, 6 insertions(+), 3 deletions(-)<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br>
> index f8615a4..57337d4 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br>
> @@ -185,6 +185,7 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,<br>
> struct amdgpu_job *job)<br>
> {<br>
> struct amdgpu_device *adev = ring->adev;<br>
> + uint64_t fence_context = adev->fence_context + ring->idx;<br>
> struct fence *updates = sync->last_vm_update;<br>
> struct amdgpu_vm_id *id, *idle;<br>
> struct fence **fences;<br>
> @@ -244,7 +245,6 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,<br>
> i = ring->idx;<br>
> do {<br>
> struct fence *flushed;<br>
> - bool same_ring = ring->idx == i;<br>
> <br>
> id = vm->ids[i++];<br>
> if (i == AMDGPU_MAX_RINGS)<br>
> @@ -262,8 +262,11 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,<br>
> if (job->vm_pd_addr != id->pd_gpu_addr)<br>
> continue;<br>
> <br>
> - if (!same_ring &&<br>
> - (!id->last_flush || !fence_is_signaled(id->last_flush)))<br>
> + if (!id->last_flush)<br>
> + continue;<br>
> +<br>
> + if (id->last_flush->context != fence_context &&<br>
> + !fence_is_signaled(id->last_flush))<br>
> continue;<br>
> <br>
> flushed = id->flushed_updates;<br>
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