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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Is that clock gating or uvd clock dpm?<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Alex<o:p></o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> StDenis, Tom
<br>
<b>Sent:</b> Thursday, July 14, 2016 2:04 PM<br>
<b>To:</b> Deucher, Alexander<br>
<b>Cc:</b> amd-gfx list<br>
<b>Subject:</b> Re: powerplay UVD CG (defaults to on)<o:p></o:p></span></p>
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<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black">Hi Alex,<o:p></o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black"><o:p> </o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black">Thing is once the core is in use (and all times after that) UVD clocks are being gated (by firmware) as you'd expect. For instance, UDEC_SCLK is reading ~10% by the debug
tool while playing a 1080p h264 video on my CZ. If I stop playing video the clock doesn't go back to 100% so FW is still gating it (reads 0%).<o:p></o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black"><o:p> </o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black">It's likely a late_init issue I just wanted to know if there was a technical reason to not have it gated after loading the module (like for PG it must be enabled after
the core is initialized properly for instance which is why it's not supported in PP just yet).<o:p></o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black"><o:p> </o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black">Cheers,<o:p></o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black">Tom<o:p></o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black"><o:p> </o:p></span></p>
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<p class="MsoNormal" style="background:white"><b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:black">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:black"> Deucher, Alexander<br>
<b>Sent:</b> Thursday, July 14, 2016 13:59<br>
<b>To:</b> StDenis, Tom; amd-gfx list<br>
<b>Subject:</b> RE: powerplay UVD CG (defaults to on)</span><span style="font-family:"Calibri","sans-serif";color:black">
<o:p></o:p></span></p>
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<p class="MsoNormal" style="background:white"><span style="font-family:"Calibri","sans-serif";color:black"> <o:p></o:p></span></p>
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<p style="background:white"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">On asic powerup, the UVD clocks are not gated IIRC. All the blocks that support clockgating get gated in amdgpu_late_init() in amdgpu_device which calls
the set_clockgating_state() callback for each IP. So they should be gated at that point. You'll probably want to check and see what powerplay does in it’s set_clockgating_state or late_init IP callbacks. UVD and VCE are a bit trickier since they only support
manual clock and powergating.</span><span style="color:black"><o:p></o:p></span></p>
<p style="background:white"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"> </span><span style="color:black"><o:p></o:p></span></p>
<p style="background:white"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Alex</span><span style="color:black"><o:p></o:p></span></p>
<p style="background:white"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"> </span><span style="color:black"><o:p></o:p></span></p>
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<p style="background:white"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif";color:black">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif";color:black"> amd-gfx [<a href="mailto:amd-gfx-bounces@lists.freedesktop.org">mailto:amd-gfx-bounces@lists.freedesktop.org</a>]
<b>On Behalf Of </b>StDenis, Tom<br>
<b>Sent:</b> Thursday, July 14, 2016 10:05 AM<br>
<b>To:</b> amd-gfx list<br>
<b>Subject:</b> powerplay UVD CG (defaults to on)</span><span style="color:black"><o:p></o:p></span></p>
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<p style="background:white"><span style="color:black"> <o:p></o:p></span></p>
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<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black">Upon loading the module the UVD clocks are full on until you use the UVD block in which case CG kicks in. This is on a boot with pg_mask=0 but cg_mask left alone (I'm
trying to see if I can get a system hang with PG alone turned off).<o:p></o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black"> <o:p></o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black">That's probably a bug in powerplay though right? I'd think on boot the UVD clocks should gate. Is that on purpose or as a workaround for something?<o:p></o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black"> <o:p></o:p></span></p>
<p style="background:white"><span style="font-family:"Calibri","sans-serif";color:black">Tom<o:p></o:p></span></p>
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