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<div class="moz-cite-prefix">Am 26.07.2016 um 09:40 schrieb zhoucm1:<br>
</div>
<blockquote cite="mid:579713E6.2040805@amd.com" type="cite">
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<br>
<div class="moz-cite-prefix">On 2016年07月26日 15:32, Christian König
wrote:<br>
</div>
<blockquote
cite="mid:46261ccd-61dd-0fc5-ba9d-eaafb40da038@vodafone.de"
type="cite">Ok, I really wasn't expecting this. How about 100ms?
<br>
</blockquote>
I tried it just now, 100ms isn't enough as well, see the append
log.<br>
<br>
<blockquote
cite="mid:46261ccd-61dd-0fc5-ba9d-eaafb40da038@vodafone.de"
type="cite"> <br>
I just want to avoid that a reset takes more than 1 or 2 seconds
even when it didn't worked. <br>
<br>
With 1 second timeout for each IB test we easily need 10+
seconds when the hardware doesn't response at all. <br>
</blockquote>
This isn't true, when anyone of them timeout happens,
amdgpu_ib_ring_tests will return error.<br>
</blockquote>
<br>
Ah! Of course we abort after the first failed test.<br>
<br>
In this case feel free to add my Reviewed-by: Christian König
<a class="moz-txt-link-rfc2396E" href="mailto:christian.koenig@amd.com"><christian.koenig@amd.com></a> to the original patch.<br>
<br>
Regards,<br>
Christian.<br>
<br>
<blockquote cite="mid:579713E6.2040805@amd.com" type="cite"> <br>
[ 59.286927] [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx
timeout, last signaled seq=30397, last emitted seq=30399<br>
[ 59.287253] [drm] IP block:1 is hang!<br>
[ 59.287262] [drm] IP block:5 is hang!<br>
[ 59.288375] [drm] Some block need full reset!<br>
[ 59.288385] pp_set_clockgating_state was not implemented.<br>
[ 59.343335] amdgpu 0000:03:00.0: GPU pci config reset<br>
[ 59.422762] amdgpu 0000:03:00.0: GPU reset succeeded, trying to
resume<br>
[ 59.423971] [drm] PCIE GART of 4096M enabled (table at
0x0000000000040000).<br>
[ 59.433374] current thermal is out of range <br>
[ 59.436736] [drm] ring test on 0 succeeded in 14 usecs<br>
[ 59.437341] [drm] ring test on 1 succeeded in 27 usecs<br>
[ 59.437388] [drm] ring test on 2 succeeded in 23 usecs<br>
[ 59.437399] [drm] ring test on 3 succeeded in 5 usecs<br>
[ 59.437405] [drm] ring test on 4 succeeded in 2 usecs<br>
[ 59.437412] [drm] ring test on 5 succeeded in 2 usecs<br>
[ 59.437420] [drm] ring test on 6 succeeded in 3 usecs<br>
[ 59.437429] [drm] ring test on 7 succeeded in 3 usecs<br>
[ 59.437435] [drm] ring test on 8 succeeded in 2 usecs<br>
[ 59.437493] [drm] ring test on 9 succeeded in 6 usecs<br>
[ 59.437501] [drm] ring test on 10 succeeded in 6 usecs<br>
[ 59.464320] [drm] ring test on 11 succeeded in 2 usecs<br>
[ 59.464322] [drm] UVD initialized successfully.<br>
[ 59.564307] [drm] ring test on 12 succeeded in 14 usecs<br>
[ 59.564316] [drm] ring test on 13 succeeded in 3 usecs<br>
[ 59.564317] [drm] VCE initialized successfully.<br>
<font color="#ff0000">[ 59.662835] [drm:gfx_v8_0_ring_test_ib
[amdgpu]] *ERROR* amdgpu: IB test timed out.<br>
[ 59.663030] [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR*
amdgpu: failed testing IB on GFX ring (-110).</font><br>
[ 59.663227] amdgpu 0000:03:00.0: ib ring test failed (-110).<br>
[ 59.663349] pp_set_clockgating_state was not implemented.<br>
[ 59.749358] amdgpu 0000:03:00.0: GPU pci config reset<br>
[ 59.830784] amdgpu 0000:03:00.0: GPU reset succeeded, trying to
resume<br>
[ 59.831982] [drm] PCIE GART of 4096M enabled (table at
0x0000000000040000).<br>
[ 59.841412] current thermal is out of range <br>
[ 59.844763] [drm] ring test on 0 succeeded in 14 usecs<br>
[ 59.845341] [drm] ring test on 1 succeeded in 27 usecs<br>
[ 59.845385] [drm] ring test on 2 succeeded in 21 usecs<br>
[ 59.845397] [drm] ring test on 3 succeeded in 5 usecs<br>
[ 59.845406] [drm] ring test on 4 succeeded in 3 usecs<br>
[ 59.845412] [drm] ring test on 5 succeeded in 2 usecs<br>
[ 59.845421] [drm] ring test on 6 succeeded in 3 usecs<br>
[ 59.845429] [drm] ring test on 7 succeeded in 3 usecs<br>
[ 59.845435] [drm] ring test on 8 succeeded in 2 usecs<br>
[ 59.845493] [drm] ring test on 9 succeeded in 6 usecs<br>
[ 59.845500] [drm] ring test on 10 succeeded in 6 usecs<br>
[ 59.872362] [drm] ring test on 11 succeeded in 2 usecs<br>
[ 59.872363] [drm] UVD initialized successfully.<br>
root@zhoucm1-System-Product-Name:~# dmesg -c<br>
[ 59.971707] [drm] ring test on 12 succeeded in 14 usecs<br>
[ 59.971717] [drm] ring test on 13 succeeded in 3 usecs<br>
[ 59.971717] [drm] VCE initialized successfully.<br>
<font color="#ff0000">[ 60.070820] [drm:gfx_v8_0_ring_test_ib
[amdgpu]] *ERROR* amdgpu: IB test timed out.<br>
[ 60.071051] [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR*
amdgpu: failed testing IB on GFX ring (-110).</font><br>
[ 60.071252] amdgpu 0000:03:00.0: ib ring test failed (-110).<br>
[ 60.071375] pp_set_clockgating_state was not implemented.<br>
[ 60.151397] amdgpu 0000:03:00.0: GPU pci config reset<br>
[ 60.230844] amdgpu 0000:03:00.0: GPU reset succeeded, trying to
resume<br>
[ 60.232044] [drm] PCIE GART of 4096M enabled (table at
0x0000000000040000).<br>
[ 60.241412] current thermal is out of range <br>
[ 60.244746] [drm] ring test on 0 succeeded in 13 usecs<br>
[ 60.245322] [drm] ring test on 1 succeeded in 27 usecs<br>
[ 60.245368] [drm] ring test on 2 succeeded in 23 usecs<br>
[ 60.245380] [drm] ring test on 3 succeeded in 5 usecs<br>
[ 60.245386] [drm] ring test on 4 succeeded in 2 usecs<br>
[ 60.245393] [drm] ring test on 5 succeeded in 2 usecs<br>
[ 60.245402] [drm] ring test on 6 succeeded in 3 usecs<br>
<br>
<blockquote
cite="mid:46261ccd-61dd-0fc5-ba9d-eaafb40da038@vodafone.de"
type="cite"> <br>
Regards, <br>
Christian. <br>
<br>
Am 26.07.2016 um 09:28 schrieb zhoucm1: <br>
<blockquote type="cite">CQE has found timeout when they
cherry-pick your timeout patch. <br>
I also found ib_test could be timeout after gpu reset. <br>
1s maybe too long for a simple testing command, but I just
think that doesn't matter to judge timeout. <br>
<br>
Regards, <br>
David <br>
<br>
On 2016年07月26日 15:24, Christian König wrote: <br>
<blockquote type="cite">Am 26.07.2016 um 07:57 schrieb
Chunming Zhou: <br>
<blockquote type="cite">we should give enough time to IB
test. <br>
<br>
Change-Id: I92bfbe9b3aa35083f41baed8663907abfa15c8e6 <br>
Signed-off-by: Chunming Zhou <a moz-do-not-send="true"
class="moz-txt-link-rfc2396E"
href="mailto:David1.Zhou@amd.com"><David1.Zhou@amd.com></a>
<br>
</blockquote>
<br>
Do we really need more than 10ms for an IB test? A whole
second sounds awful long when we need to do 10+ tests
currently. <br>
<br>
Christian. <br>
<br>
<blockquote type="cite">--- <br>
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +- <br>
1 file changed, 1 insertion(+), 1 deletion(-) <br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c <br>
index 050062e..a31d7ef 100644 <br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c <br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c <br>
@@ -33,7 +33,7 @@ <br>
#include "amdgpu.h" <br>
#include "atom.h" <br>
-#define AMDGPU_IB_TEST_TIMEOUT msecs_to_jiffies(10)
<br>
+#define AMDGPU_IB_TEST_TIMEOUT msecs_to_jiffies(1000)
<br>
/* <br>
* IB <br>
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