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    <div class="moz-cite-prefix">Am 22.08.2016 um 02:41 schrieb Edward
      O'Callaghan:<br>
    </div>
    <blockquote
      cite="mid:73e7bbfa-45a7-1f1e-ae19-52a6461f4a9f@folklore1984.net"
      type="cite">
      <pre wrap="">

On 08/22/2016 10:38 AM, Alexandre Demers wrote:
</pre>
      <blockquote type="cite">
        <pre wrap="">We were using the same mask twice. Looking at radeon, it seems
we should be using HDMI_AVI_INFO_CONT instead as the second mask.

Being there, fix typos in comments and improved readability.

I haven't looked at other DCEs, the mask may also be wrong for them.

Signed-off-by: Alexandre Demers <a class="moz-txt-link-rfc2396E" href="mailto:alexandre.f.demers@gmail.com"><alexandre.f.demers@gmail.com></a>
</pre>
      </blockquote>
      <pre wrap="">Reviewed-by: Edward O'Callaghan <a class="moz-txt-link-rfc2396E" href="mailto:funfunctor@folklore1984.net"><funfunctor@folklore1984.net></a>

</pre>
      <blockquote type="cite">
        <pre wrap="">---
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index c7e5d5f..e424ecc 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -1693,6 +1693,7 @@ static void dce_v8_0_afmt_setmode(struct drm_encoder *encoder,
        /* Silent, r600_hdmi_enable will raise WARN for us */
        if (!dig->afmt->enabled)
                return;
+
        offset = dig->afmt->offset;
 
        /* hdmi deep color mode general control packets setup, if bpc > 8 */
@@ -1817,7 +1818,7 @@ static void dce_v8_0_afmt_setmode(struct drm_encoder *encoder,
 
        WREG32_OR(mmHDMI_INFOFRAME_CONTROL0 + offset,
                  HDMI_INFOFRAME_CONTROL0__HDMI_AVI_INFO_SEND_MASK | /* enable AVI info frames */
-                 HDMI_INFOFRAME_CONTROL0__HDMI_AVI_INFO_SEND_MASK); /* required for audio info values to be updated */
+                 HDMI_INFOFRAME_CONTROL0__HDMI_AVI_INFO_CONT_MASK); /* required for audio info values to be updated */
 
        WREG32_P(mmHDMI_INFOFRAME_CONTROL1 + offset,
                 (2 << HDMI_INFOFRAME_CONTROL1__HDMI_AVI_INFO_LINE__SHIFT), /* anything other than 0 */
@@ -1826,13 +1827,13 @@ static void dce_v8_0_afmt_setmode(struct drm_encoder *encoder,
        WREG32_OR(mmAFMT_AUDIO_PACKET_CONTROL + offset,
                  AFMT_AUDIO_PACKET_CONTROL__AFMT_AUDIO_SAMPLE_SEND_MASK); /* send audio packets */
 
-       /* it's unknown what these bits do excatly, but it's indeed quite useful for debugging */
+       /* it's unknown what these bits do exactly, but it's indeed quite useful for debugging */</pre>
      </blockquote>
    </blockquote>
    <br>
    You can actually completely drop this comment now. I added it when I
    originally reverse engineered the hardware to figure out how HDMI
    audio works.<br>
    <br>
    With that fixed the patch is Reviewed-by: Christian König
    <a class="moz-txt-link-rfc2396E" href="mailto:christian.koenig@amd.com"><christian.koenig@amd.com></a>.<br>
    <br>
    Regards,<br>
    Christian. <br>
    <br>
    <blockquote
      cite="mid:73e7bbfa-45a7-1f1e-ae19-52a6461f4a9f@folklore1984.net"
      type="cite">
      <blockquote type="cite">
        <pre wrap="">
        WREG32(mmAFMT_RAMP_CONTROL0 + offset, 0x00FFFFFF);
        WREG32(mmAFMT_RAMP_CONTROL1 + offset, 0x007FFFFF);
        WREG32(mmAFMT_RAMP_CONTROL2 + offset, 0x00000001);
        WREG32(mmAFMT_RAMP_CONTROL3 + offset, 0x00000001);
 
-       /* enable audio after to setting up hw */
+       /* enable audio after setting up hw */
        dce_v8_0_audio_enable(adev, dig->afmt->pin, true);
 }
 

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      <br>
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