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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">You could also just reuse one of the tmp variables too. Either way:<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Reviewed-by: Alex Deucher <alexander.deucher@amd.com><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org]
<b>On Behalf Of </b>StDenis, Tom<br>
<b>Sent:</b> Wednesday, November 09, 2016 5:24 AM<br>
<b>To:</b> Zhu, Rex<br>
<b>Cc:</b> amd-gfx@lists.freedesktop.org<br>
<b>Subject:</b> Re: [PATCH 1/2] drm/amdgpu: always un-gate UVD REGS path.<o:p></o:p></span></p>
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<p><span style="font-family:"Calibri","sans-serif";color:black">You could do that as <o:p></o:p></span></p>
<p><span style="font-family:"Calibri","sans-serif";color:black"><o:p> </o:p></span></p>
<p><span style="font-family:"Calibri","sans-serif";color:black">WREG32_FIELD(UVD_CGC_GATE, REGS, 0);<o:p></o:p></span></p>
<p><span style="font-family:"Calibri","sans-serif";color:black"><o:p> </o:p></span></p>
<p><span style="font-family:"Calibri","sans-serif";color:black">Unless you need 'data' somewhere else in the function.<o:p></o:p></span></p>
<p><span style="font-family:"Calibri","sans-serif";color:black"><o:p> </o:p></span></p>
<p><span style="font-family:"Calibri","sans-serif";color:black">Tom<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-family:"Calibri","sans-serif";color:black"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:black">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:black"> amd-gfx <<a href="mailto:amd-gfx-bounces@lists.freedesktop.org">amd-gfx-bounces@lists.freedesktop.org</a>>
on behalf of Rex Zhu <<a href="mailto:Rex.Zhu@amd.com">Rex.Zhu@amd.com</a>><br>
<b>Sent:</b> Wednesday, November 9, 2016 05:08<br>
<b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>Cc:</b> Zhu, Rex<br>
<b>Subject:</b> [PATCH 1/2] drm/amdgpu: always un-gate UVD REGS path.</span><span style="font-family:"Calibri","sans-serif";color:black">
<o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-family:"Calibri","sans-serif";color:black"> <o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Calibri","sans-serif";color:black">Change-Id: I910a79b551a9b79b635161bb42ac123a23783225<br>
Signed-off-by: Rex Zhu <<a href="mailto:Rex.Zhu@amd.com">Rex.Zhu@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 3 +++<br>
1 file changed, 3 insertions(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c<br>
index d2c96f1..d686946 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c<br>
@@ -596,7 +596,10 @@ static void uvd_v4_2_set_dcm(struct amdgpu_device *adev,<br>
bool sw_mode)<br>
{<br>
u32 tmp, tmp2;<br>
+ u32 data = RREG32(mmUVD_CGC_GATE);<br>
<br>
+ data &= ~UVD_CGC_GATE__REGS_MASK;<br>
+ WREG32(mmUVD_CGC_GATE, data);<br>
tmp = RREG32(mmUVD_CGC_CTRL);<br>
tmp &= ~(UVD_CGC_CTRL__CLK_OFF_DELAY_MASK | UVD_CGC_CTRL__CLK_GATE_DLY_TIMER_MASK);<br>
tmp |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK |<br>
-- <br>
1.9.1<br>
<br>
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