<div dir="ltr">This patch is preventing my laptop from booting, I'm getting D3 error messages and atom bios stuck messages<div><br></div><div>I mistakenly saw the v2 patch and didn't realise it was for radeon not amdgpu - this branch and Linus's tree are currently not booting for me</div></div><br><div class="gmail_quote"><div dir="ltr">On Wed, 23 Nov 2016 at 17:16 Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">> -----Original Message-----<br class="gmail_msg">
> From: Peter Wu [mailto:<a href="mailto:peter@lekensteyn.nl" class="gmail_msg" target="_blank">peter@lekensteyn.nl</a>]<br class="gmail_msg">
> Sent: Wednesday, November 23, 2016 12:13 PM<br class="gmail_msg">
> To: Alex Deucher<br class="gmail_msg">
> Cc: amd-gfx list; Deucher, Alexander; Nayan Deshmukh<br class="gmail_msg">
> Subject: Re: [PATCH 1/2] drm/amdgpu: fix power state when port pm is<br class="gmail_msg">
> unavailable<br class="gmail_msg">
><br class="gmail_msg">
> On Wed, Nov 23, 2016 at 12:01:55PM -0500, Alex Deucher wrote:<br class="gmail_msg">
> > On Tue, Nov 22, 2016 at 8:22 PM, Peter Wu <<a href="mailto:peter@lekensteyn.nl" class="gmail_msg" target="_blank">peter@lekensteyn.nl</a>> wrote:<br class="gmail_msg">
> > > When PCIe port PM is not enabled (system BIOS is pre-2015 or the<br class="gmail_msg">
> > > pcie_port_pm=off parameter is set), legacy ATPX PM should still be<br class="gmail_msg">
> > > marked as supported. Otherwise the GPU can fail to power on after<br class="gmail_msg">
> > > runtime suspend. This affected a Dell Inspiron 5548.<br class="gmail_msg">
> > ><br class="gmail_msg">
> > > Ideally the BIOS date in the PCI core is lowered to 2013 (the first year<br class="gmail_msg">
> > > where hybrid graphics platforms using power resources was introduced),<br class="gmail_msg">
> > > but that seems more risky at this point and would not solve the<br class="gmail_msg">
> > > pcie_port_pm=off issue.<br class="gmail_msg">
> > ><br class="gmail_msg">
> > > Bugzilla: <a href="https://bugs.freedesktop.org/show_bug.cgi?id=98505" rel="noreferrer" class="gmail_msg" target="_blank">https://bugs.freedesktop.org/show_bug.cgi?id=98505</a><br class="gmail_msg">
> > > Reported-and-tested-by: Nayan Deshmukh<br class="gmail_msg">
> <<a href="mailto:nayan26deshmukh@gmail.com" class="gmail_msg" target="_blank">nayan26deshmukh@gmail.com</a>><br class="gmail_msg">
> > > Signed-off-by: Peter Wu <<a href="mailto:peter@lekensteyn.nl" class="gmail_msg" target="_blank">peter@lekensteyn.nl</a>><br class="gmail_msg">
> > > ---<br class="gmail_msg">
> > > Hi,<br class="gmail_msg">
> > ><br class="gmail_msg">
> > > This patch is already three weeks old. One alternative idea was lowering<br class="gmail_msg">
> BIOS<br class="gmail_msg">
> > > date in PCI core, but as pcie_port_pm=force did not have the desired<br class="gmail_msg">
> effect, I<br class="gmail_msg">
> > > do not think that this would help though.<br class="gmail_msg">
> ><br class="gmail_msg">
> > Thanks for doing this.<br class="gmail_msg">
> ><br class="gmail_msg">
> > ><br class="gmail_msg">
> > > I have also not contacted linux-pci or Mika about lowering the year due to<br class="gmail_msg">
> the<br class="gmail_msg">
> > > lack of a good reason. Might do it later though once ACPICA bug 1333 is<br class="gmail_msg">
> sorted<br class="gmail_msg">
> > > out such that lowering the year actually has benefits for a Nvidia laptop<br class="gmail_msg">
> (or if<br class="gmail_msg">
> > > some amdgpu problem can be solved by this).<br class="gmail_msg">
> > ><br class="gmail_msg">
> > > Both patches should probably be Cc stable (4.8+), fixing 2f5af82eeab2 and<br class="gmail_msg">
> > > b8c9fd5ad4b4 ("track whether if this is a hybrid graphics platform"). There<br class="gmail_msg">
> have<br class="gmail_msg">
> > > been some ifdef 0's and reverts in between, so I was not sure if adding<br class="gmail_msg">
> the<br class="gmail_msg">
> > > Fixes tag is appropriate.<br class="gmail_msg">
> ><br class="gmail_msg">
> > I don't think we need to cc stable. In kernel 4.8 we don't attempt to<br class="gmail_msg">
> > do d3cold at all. 4.8 and older kernels have:<br class="gmail_msg">
> > c63695cc5e5f685e924e25a8f9555f6e846f1fc6 (drm/amdgpu: work around<br class="gmail_msg">
> lack<br class="gmail_msg">
> > of upstream ACPI support for D3cold)<br class="gmail_msg">
> > which was reverted for 4.9.<br class="gmail_msg">
><br class="gmail_msg">
> That patch was already reverted in 4.8 as far as I can see:<br class="gmail_msg">
><br class="gmail_msg">
> $ git tag --contains c39b487f195b93235ee76384427467786f7bf29f | grep v4.8<br class="gmail_msg">
> v4.8<br class="gmail_msg">
><br class="gmail_msg">
> Can you double-check? v4.8 was the first kernel with D3cold support in<br class="gmail_msg">
> PCI core.<br class="gmail_msg">
<br class="gmail_msg">
You are right. I was thinking d3cold went upstream in 4.9, so yes, we should apply this to 4.8.<br class="gmail_msg">
<br class="gmail_msg">
Alex<br class="gmail_msg">
<br class="gmail_msg">
><br class="gmail_msg">
> > Series is:<br class="gmail_msg">
> > Reviewed-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com" class="gmail_msg" target="_blank">alexander.deucher@amd.com</a>><br class="gmail_msg">
><br class="gmail_msg">
> Thanks!<br class="gmail_msg">
><br class="gmail_msg">
> Kind regards,<br class="gmail_msg">
> Peter<br class="gmail_msg">
><br class="gmail_msg">
> ><br class="gmail_msg">
> > ><br class="gmail_msg">
> > > Kind regards,<br class="gmail_msg">
> > > Peter<br class="gmail_msg">
> > > ---<br class="gmail_msg">
> > > drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 9 ++++++++-<br class="gmail_msg">
> > > 1 file changed, 8 insertions(+), 1 deletion(-)<br class="gmail_msg">
> > ><br class="gmail_msg">
> > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c<br class="gmail_msg">
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c<br class="gmail_msg">
> > > index 10b5ddf..951addf 100644<br class="gmail_msg">
> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c<br class="gmail_msg">
> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c<br class="gmail_msg">
> > > @@ -33,6 +33,7 @@ struct amdgpu_atpx {<br class="gmail_msg">
> > ><br class="gmail_msg">
> > > static struct amdgpu_atpx_priv {<br class="gmail_msg">
> > > bool atpx_detected;<br class="gmail_msg">
> > > + bool bridge_pm_usable;<br class="gmail_msg">
> > > /* handle for device - and atpx */<br class="gmail_msg">
> > > acpi_handle dhandle;<br class="gmail_msg">
> > > acpi_handle other_handle;<br class="gmail_msg">
> > > @@ -200,7 +201,11 @@ static int amdgpu_atpx_validate(struct<br class="gmail_msg">
> amdgpu_atpx *atpx)<br class="gmail_msg">
> > > atpx->is_hybrid = false;<br class="gmail_msg">
> > > if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {<br class="gmail_msg">
> > > printk("ATPX Hybrid Graphics\n");<br class="gmail_msg">
> > > - atpx->functions.power_cntl = false;<br class="gmail_msg">
> > > + /*<br class="gmail_msg">
> > > + * Disable legacy PM methods only when pcie port PM is usable,<br class="gmail_msg">
> > > + * otherwise the device might fail to power off or power on.<br class="gmail_msg">
> > > + */<br class="gmail_msg">
> > > + atpx->functions.power_cntl =<br class="gmail_msg">
> !amdgpu_atpx_priv.bridge_pm_usable;<br class="gmail_msg">
> > > atpx->is_hybrid = true;<br class="gmail_msg">
> > > }<br class="gmail_msg">
> > ><br class="gmail_msg">
> > > @@ -471,6 +476,7 @@ static int amdgpu_atpx_power_state(enum<br class="gmail_msg">
> vga_switcheroo_client_id id,<br class="gmail_msg">
> > > */<br class="gmail_msg">
> > > static bool amdgpu_atpx_pci_probe_handle(struct pci_dev *pdev)<br class="gmail_msg">
> > > {<br class="gmail_msg">
> > > + struct pci_dev *parent_pdev = pci_upstream_bridge(pdev);<br class="gmail_msg">
> > > acpi_handle dhandle, atpx_handle;<br class="gmail_msg">
> > > acpi_status status;<br class="gmail_msg">
> > ><br class="gmail_msg">
> > > @@ -485,6 +491,7 @@ static bool<br class="gmail_msg">
> amdgpu_atpx_pci_probe_handle(struct pci_dev *pdev)<br class="gmail_msg">
> > > }<br class="gmail_msg">
> > > amdgpu_atpx_priv.dhandle = dhandle;<br class="gmail_msg">
> > > amdgpu_atpx_priv.atpx.handle = atpx_handle;<br class="gmail_msg">
> > > + amdgpu_atpx_priv.bridge_pm_usable = parent_pdev &&<br class="gmail_msg">
> parent_pdev->bridge_d3;<br class="gmail_msg">
> > > return true;<br class="gmail_msg">
> > > }<br class="gmail_msg">
> > ><br class="gmail_msg">
> > > --<br class="gmail_msg">
> > > 2.10.2<br class="gmail_msg">
_______________________________________________<br class="gmail_msg">
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</blockquote></div>