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<p>NAH, for AI/VI the gds_addr is the bottom half of CSA area
(8kb), but we don't know for later chips ...</p>
</blockquote>
In this case we shouldn't store the offset anywhere, but rather
just calculate it in the chip specific code from the CSA address
when it is needed.<br>
<br>
<blockquote type="cite">
<p>I prefer keep a member field in the struct for flexibility
... <br>
</p>
</blockquote>
We can still change it if we find that we need more flexibility
here. Usually we try to avoid flexibility for the cost of
complexity if we don't have a good reason for it.<br>
<br>
It just complicates the code and over the long term creates
maintenance problems because you end of with a lot of only halve
way implemented features.<br>
<br>
Regards,<br>
Christian.<br>
<br>
Am 10.01.2017 um 10:57 schrieb Liu, Monk:<br>
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<p>NAH, for AI/VI the gds_addr is the bottom half of CSA area
(8kb), but we don't know for later chips ...</p>
<p>I prefer keep a member field in the struct for flexibility
... <br>
</p>
<p><br>
</p>
<p>regards with put those member into amdgpu_vm structure, if
you really prefer that way I'm fine by moving them, not too
important anyway.</p>
<p><br>
</p>
<p>BR Monk<br>
</p>
<p><br>
</p>
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<hr style="display:inline-block;width:98%" tabindex="-1">
<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt"
color="#000000" face="Calibri, sans-serif"><b>发件人:</b> amd-gfx
<a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx-bounces@lists.freedesktop.org"><amd-gfx-bounces@lists.freedesktop.org></a> 代表 Christian
König <a class="moz-txt-link-rfc2396E" href="mailto:deathsimple@vodafone.de"><deathsimple@vodafone.de></a><br>
<b>发送时间:</b> 2017年1月10日 17:51:46<br>
<b>收件人:</b> Liu, Monk; <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>主题:</b> Re: 答复: [PATCH 2/7] drm/amdgpu:new field members
for SRIOV</font>
<div> </div>
</div>
<div>
<div class="moz-cite-prefix">Am 10.01.2017 um 04:03 schrieb Liu,
Monk:<br>
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<p><font size="2"><span style="font-size:10pt">> +
/* virtual MC address of CSA & GDS for each VM
*/<br>
> + uint64_t vm_csa_addr;<br>
> + uint64_t vm_gds_addr;<br>
<br>
That should be constant, shouldn't it?</span></font></p>
<p><br>
</p>
<p><br>
</p>
<p>[ML] do you mean "const uint64_t vm_csa_addr" ? of
cause not if that's your point ... compiling error on
that
<br>
</p>
<p>and strictly speaking that's not constant, the address
is calculated ...<br>
</p>
</div>
</div>
</blockquote>
<br>
No that wasn't what I meant. The address is constant for all
VM's in the system, isn't it?<br>
<br>
Just add a define similar to AMDGPU_VA_RESERVED_SIZE and stop
calculating it all together (BTW: AMDGPU_VA_RESERVED_SIZE should
probably be moved to amdgpu_vm.h).<br>
<br>
Regards,<br>
Christian.<br>
<br>
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<div id="x_divRplyFwdMsg" dir="ltr"><font
style="font-size:11pt" color="#000000" face="Calibri,
sans-serif"><b>发件人:</b> Christian König
<a moz-do-not-send="true" class="moz-txt-link-rfc2396E"
href="mailto:deathsimple@vodafone.de"><deathsimple@vodafone.de></a><br>
<b>发送时间:</b> 2017年1月9日 18:57:06<br>
<b>收件人:</b> Liu, Monk; <a moz-do-not-send="true"
class="moz-txt-link-abbreviated"
href="mailto:amd-gfx@lists.freedesktop.org">
amd-gfx@lists.freedesktop.org</a><br>
<b>主题:</b> Re: [PATCH 2/7] drm/amdgpu:new field members
for SRIOV</font>
<div> </div>
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<font size="2"><span style="font-size:10pt;">
<div class="PlainText">Am 09.01.2017 um 09:02 schrieb Monk
Liu:<br>
> Change-Id:
Ife0eff7b13b8b5946f005a39f6ecb8db1cb72c38<br>
> Signed-off-by: Monk Liu <a moz-do-not-send="true"
class="moz-txt-link-rfc2396E"
href="mailto:Monk.Liu@amd.com">
<Monk.Liu@amd.com></a><br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 19
+++++++++++++++++++<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 ++<br>
> 2 files changed, 21 insertions(+)<br>
><br>
> diff --git
a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h<br>
> index 0d821d9..5aa7f0c 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h<br>
> @@ -28,9 +28,28 @@<br>
> #define AMDGPU_SRIOV_CAPS_ENABLE_IOV (1
<< 1) /* sr-iov is enabled on this GPU */<br>
> #define AMDGPU_SRIOV_CAPS_IS_VF (1
<< 2) /* this GPU is a virtual function */<br>
> #define AMDGPU_PASSTHROUGH_MODE (1
<< 3) /* thw whole GPU is pass through for VM */<br>
> +<br>
> +struct amdgpu_vm;<br>
> /* GPU virtualization */<br>
> struct amdgpu_virt {<br>
> uint32_t caps;<br>
> + uint32_t csa_size;<br>
> + struct amdgpu_bo *csa_obj;<br>
> + uint64_t csa_vmid0_addr;<br>
> + uint64_t gds_vmid0_addr;<br>
> + int (*allocate_csa)(struct amdgpu_device
*adev);<br>
> + void (*deallocate_csa)(struct amdgpu_device
*adev);<br>
> + int (*map_csa)(struct amdgpu_device *adev,
struct amdgpu_vm *vm);<br>
> + void (*unmap_csa)(struct amdgpu_device *adev,
struct amdgpu_vm *vm);<br>
<br>
Why callbacks for this?<br>
<br>
> +};<br>
> +<br>
> +struct amdgpu_vm_virt {<br>
> + /* each VM will map on CSA */<br>
> + struct ttm_validate_buffer csa_tv;<br>
> + struct amdgpu_bo_va *csa_bo_va;<br>
<br>
Please put that directly into the amdgpu_vm structure.<br>
<br>
> + /* virtual MC address of CSA & GDS for
each VM */<br>
> + uint64_t vm_csa_addr;<br>
> + uint64_t vm_gds_addr;<br>
<br>
That should be constant, shouldn't it?<br>
<br>
Regards,<br>
Christian.<br>
<br>
> };<br>
> <br>
> #define amdgpu_sriov_enabled(adev) \<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h<br>
> index 42a629b..27cbcbc 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h<br>
> @@ -29,6 +29,7 @@<br>
> #include "gpu_scheduler.h"<br>
> #include "amdgpu_sync.h"<br>
> #include "amdgpu_ring.h"<br>
> +#include "amdgpu_virt.h"<br>
> <br>
> struct amdgpu_bo_va;<br>
> struct amdgpu_job;<br>
> @@ -111,6 +112,7 @@ struct amdgpu_vm {<br>
> <br>
> /* client id */<br>
> u64 client_id;<br>
> + struct amdgpu_vm_virt vm_virt;<br>
> };<br>
> <br>
> struct amdgpu_vm_id {<br>
<br>
<br>
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