<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> <style type="text/css" style="display:none;"></style> </head> <body dir="ltr"> <div id="divtagdefaultwrapper" style="font-size:12pt;color:#000000;font-family:Calibri,Arial,Helvetica,sans-serif;" dir="ltr"> <p>It'd be nicer to move these into the PP_SENSORS framework and then print them from pm_info. </p> <p><br> </p> <p>But other than that I don't have any strong objections to these patches.</p> <p><br> </p> <p>Tom</p> <br> <br> <div style="color: rgb(0, 0, 0);"> <div> <hr tabindex="-1" style="display:inline-block; width:98%"> <div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Donny Yang <work@kota.moe><br> <b>Sent:</b> Friday, January 13, 2017 03:58<br> <b>To:</b> amd-gfx@lists.freedesktop.org<br> <b>Cc:</b> Donny Yang<br> <b>Subject:</b> [PATCH 2/2] drm/amdgpu: Report VDDC and MVDD over pp_dpm{sclk,mclk}</font> <div> </div> </div> </div> <font size="2"><span style="font-size:10pt;"> <div class="PlainText">Signed-off-by: Donny Yang <work@kota.moe><br> ---<br> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 8 ++++++--<br> 1 file changed, 6 insertions(+), 2 deletions(-)<br> <br> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br> index 103e1330..4dd27c28 100644<br> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br> @@ -4065,6 +4065,8 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,<br> struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table);<br> struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table);<br> struct smu7_single_dpm_table *pcie_table = &(data->dpm_table.pcie_speed_table);<br> + struct smu7_single_dpm_table *vddc_table = &(data->dpm_table.vddc_table);<br> + struct smu7_single_dpm_table *mvdd_table = &(data->dpm_table.mvdd_table);<br> int i, now, size = 0;<br> uint32_t clock, pcie_speed;<br> <br> @@ -4081,8 +4083,9 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,<br> now = i;<br> <br> for (i = 0; i < sclk_table->count; i++)<br> - size += sprintf(buf + size, "%d: %uMhz %s\n",<br> + size += sprintf(buf + size, "%d: %uMhz %umV %s\n",<br> i, sclk_table->dpm_levels[i].value / 100,<br> + vddc_table->dpm_levels[i].value,<br> (i == now) ? "*" : "");<br> break;<br> case PP_MCLK:<br> @@ -4097,8 +4100,9 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,<br> now = i;<br> <br> for (i = 0; i < mclk_table->count; i++)<br> - size += sprintf(buf + size, "%d: %uMhz %s\n",<br> + size += sprintf(buf + size, "%d: %uMhz %umV %s\n",<br> i, mclk_table->dpm_levels[i].value / 100,<br> + mvdd_table->dpm_levels[i].value,<br> (i == now) ? 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