<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <meta name="Generator" content="Microsoft Exchange Server"> <style></style> </head> <body> <meta content="text/html; charset=UTF-8"> <style type="text/css" style="">  </style> <div dir="ltr"> <div id="x_divtagdefaultwrapper" dir="ltr" style="font-size:12pt; color:#000000; font-family:Calibri,Arial,Helvetica,sans-serif"> <p>Reviewed-by: Ken Wang <Qingqing.Wang@amd.com><br> </p> </div> <hr tabindex="-1" style="display:inline-block; width:98%"> <div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Rex Zhu <Rex.Zhu@amd.com><br> <b>Sent:</b> Thursday, May 4, 2017 11:33:24 AM<br> <b>To:</b> amd-gfx@lists.freedesktop.org<br> <b>Cc:</b> Zhu, Rex<br> <b>Subject:</b> [PATCH] drm/amd/powerplay: disable engine spread spectrum feature on Vega10.</font> <div> </div> </div> </div> <font size="2"><span style="font-size:10pt;"> <div class="PlainText">Vega10 atomfirmware do not have ASIC_InternalSS_Info table<br> so disable this feature by default in driver.<br> <br> Change-Id: I2ef2c668fb41fc6c6f448c7c0f1812baf8e7b375<br> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br> ---<br> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 6 +++++-<br> 1 file changed, 5 insertions(+), 1 deletion(-)<br> <br> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c<br> index 8baa890..e24e54c 100644<br> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c<br> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c<br> @@ -1535,7 +1535,11 @@ static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr,<br> current_gfxclk_level->FbMult =<br> cpu_to_le32(dividers.ulPll_fb_mult);<br> /* Spread FB Multiplier bit: bit 0:8 int, bit 31:16 frac */<br> - current_gfxclk_level->SsOn = dividers.ucPll_ss_enable;<br> + if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,<br> + PHM_PlatformCaps_EngineSpreadSpectrumSupport))<br> + current_gfxclk_level->SsOn = dividers.ucPll_ss_enable;<br> + else<br> + current_gfxclk_level->SsOn = 0;<br> current_gfxclk_level->SsFbMult =<br> cpu_to_le32(dividers.ulPll_ss_fbsmult);<br> current_gfxclk_level->SsSlewFrac =<br> -- <br> 1.9.1<br> <br> _______________________________________________<br> amd-gfx mailing list<br> amd-gfx@lists.freedesktop.org<br> <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a><br> </div> </span></font> </body> </html>