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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496">Good catch!<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496">Sam<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Yuan, Xiaojie
<br>
<b>Sent:</b> Thursday, May 11, 2017 6:51 AM<br>
<b>To:</b> Li, Samuel <Samuel.Li@amd.com>; amd-gfx@lists.freedesktop.org<br>
<b>Subject:</b> Re: [PATCH 1/1] amdgpu: move asic id table to a separate file<o:p></o:p></span></p>
</div>
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<p class="MsoNormal"><o:p> </o:p></p>
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<div id="x_divtagdefaultwrapper">
<p><span style="font-family:"Calibri",sans-serif;color:black">Hi Samuel,<o:p></o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif;color:black"><o:p> </o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif;color:black">Here's an off-by-one error:<o:p></o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif;color:black">+ id = asic_id_table + table_size -1;<o:p></o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif;color:black"><o:p> </o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif;color:black">should be:<o:p></o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif;color:black">+ id = asic_id_table + table_size;<o:p></o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif;color:black"><o:p> </o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif;color:black">Regards,<o:p></o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif;color:black">Xiaojie<o:p></o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> Li, Samuel<br>
<b>Sent:</b> Thursday, May 11, 2017 4:56:55 AM<br>
<b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>Cc:</b> Yuan, Xiaojie; Li, Samuel<br>
<b>Subject:</b> [PATCH 1/1] amdgpu: move asic id table to a separate file</span> <o:p>
</o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-size:10.0pt">From: Xiaojie Yuan <<a href="mailto:Xiaojie.Yuan@amd.com">Xiaojie.Yuan@amd.com</a>><br>
<br>
Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9<br>
Signed-off-by: Samuel Li <<a href="mailto:Samuel.Li@amd.com">Samuel.Li@amd.com</a>><br>
---<br>
amdgpu/Makefile.am | 2 +<br>
amdgpu/Makefile.sources | 2 +-<br>
amdgpu/amdgpu_asic_id.c | 198 +++++++++++++++++++++++++++++++++++++++++++++++<br>
amdgpu/amdgpu_asic_id.h | 165 ---------------------------------------<br>
amdgpu/amdgpu_device.c | 28 +++++--<br>
amdgpu/amdgpu_internal.h | 10 +++<br>
6 files changed, 232 insertions(+), 173 deletions(-)<br>
create mode 100644 amdgpu/amdgpu_asic_id.c<br>
delete mode 100644 amdgpu/amdgpu_asic_id.h<br>
<br>
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am<br>
index cf7bc1b..ecf9e82 100644<br>
--- a/amdgpu/Makefile.am<br>
+++ b/amdgpu/Makefile.am<br>
@@ -30,6 +30,8 @@ AM_CFLAGS = \<br>
$(PTHREADSTUBS_CFLAGS) \<br>
-I$(top_srcdir)/include/drm<br>
<br>
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${datadir}/libdrm/amdgpu.ids\"<br>
+<br>
libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la<br>
libdrm_amdgpu_ladir = $(libdir)<br>
libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined<br>
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources<br>
index 487b9e0..bc3abaa 100644<br>
--- a/amdgpu/Makefile.sources<br>
+++ b/amdgpu/Makefile.sources<br>
@@ -1,5 +1,5 @@<br>
LIBDRM_AMDGPU_FILES := \<br>
- amdgpu_asic_id.h \<br>
+ amdgpu_asic_id.c \<br>
amdgpu_bo.c \<br>
amdgpu_cs.c \<br>
amdgpu_device.c \<br>
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c<br>
new file mode 100644<br>
index 0000000..d50e21a<br>
--- /dev/null<br>
+++ b/amdgpu/amdgpu_asic_id.c<br>
@@ -0,0 +1,198 @@<br>
+/*<br>
+ * Copyright © 2017 Advanced Micro Devices, Inc.<br>
+ * All Rights Reserved.<br>
+ *<br>
+ * Permission is hereby granted, free of charge, to any person obtaining a<br>
+ * copy of this software and associated documentation files (the "Software"),<br>
+ * to deal in the Software without restriction, including without limitation<br>
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,<br>
+ * and/or sell copies of the Software, and to permit persons to whom the<br>
+ * Software is furnished to do so, subject to the following conditions:<br>
+ *<br>
+ * The above copyright notice and this permission notice shall be included in<br>
+ * all copies or substantial portions of the Software.<br>
+ *<br>
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR<br>
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,<br>
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL<br>
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR<br>
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,<br>
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR<br>
+ * OTHER DEALINGS IN THE SOFTWARE.<br>
+ *<br>
+ */<br>
+<br>
+#ifdef HAVE_CONFIG_H<br>
+#include "config.h"<br>
+#endif<br>
+<br>
+#include <stdio.h><br>
+#include <stdlib.h><br>
+#include <stdint.h><br>
+#include <string.h><br>
+#include <unistd.h><br>
+#include <errno.h><br>
+<br>
+#include "amdgpu_drm.h"<br>
+#include "amdgpu_internal.h"<br>
+<br>
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)<br>
+{<br>
+ char *buf;<br>
+ char *s_did;<br>
+ char *s_rid;<br>
+ char *s_name;<br>
+ char *endptr;<br>
+ int r = 0;<br>
+<br>
+ buf = strdup(line);<br>
+ if (!buf)<br>
+ return -ENOMEM;<br>
+<br>
+ /* ignore empty line and commented line */<br>
+ if (strlen(line) == 0 || line[0] == '#') {<br>
+ r = -EAGAIN;<br>
+ goto out;<br>
+ }<br>
+<br>
+ /* device id */<br>
+ s_did = strtok(buf, ",");<br>
+ if (!s_did) {<br>
+ r = -EINVAL;<br>
+ goto out;<br>
+ }<br>
+<br>
+ id->did = strtol(s_did, &endptr, 16);<br>
+ if (*endptr) {<br>
+ r = -EINVAL;<br>
+ goto out;<br>
+ }<br>
+<br>
+ /* revision id */<br>
+ s_rid = strtok(NULL, ",");<br>
+ if (!s_rid) {<br>
+ r = -EINVAL;<br>
+ goto out;<br>
+ }<br>
+<br>
+ id->rid = strtol(s_rid, &endptr, 16);<br>
+ if (*endptr) {<br>
+ r = -EINVAL;<br>
+ goto out;<br>
+ }<br>
+<br>
+ /* marketing name */<br>
+ s_name = strtok(NULL, ",");<br>
+ if (!s_name) {<br>
+ r = -EINVAL;<br>
+ goto out;<br>
+ }<br>
+<br>
+ id->marketing_name = strdup(s_name);<br>
+ if (id->marketing_name == NULL) {<br>
+ r = -EINVAL;<br>
+ goto out;<br>
+ }<br>
+<br>
+out:<br>
+ free(buf);<br>
+<br>
+ return r;<br>
+}<br>
+<br>
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)<br>
+{<br>
+ struct amdgpu_asic_id *asic_id_table;<br>
+ struct amdgpu_asic_id *id;<br>
+ FILE *fp;<br>
+ char *line = NULL;<br>
+ size_t len;<br>
+ ssize_t n;<br>
+ int line_num = 1;<br>
+ size_t table_size = 0;<br>
+ size_t table_max_size = 256;<br>
+ int r = 0;<br>
+<br>
+ fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");<br>
+ if (!fp) {<br>
+ fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,<br>
+ strerror(errno));<br>
+ return -EINVAL;<br>
+ }<br>
+<br>
+ asic_id_table = calloc(table_max_size, sizeof(struct amdgpu_asic_id));<br>
+ if (!asic_id_table) {<br>
+ r = -ENOMEM;<br>
+ goto close;<br>
+ }<br>
+<br>
+ /* 1st line is file version */<br>
+ if ((n = getline(&line, &len, fp)) != -1) {<br>
+ /* trim trailing newline */<br>
+ if (line[n - 1] == '\n')<br>
+ line[n - 1] = '\0';<br>
+ printf("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);<br>
+ } else {<br>
+ goto free;<br>
+ }<br>
+<br>
+ while ((n = getline(&line, &len, fp)) != -1) {<br>
+ id = asic_id_table + table_size;<br>
+<br>
+ /* trim trailing newline */<br>
+ if (line[n - 1] == '\n')<br>
+ line[n - 1] = '\0';<br>
+<br>
+ /*<br>
+ * parse one line, its format looks like:<br>
+ * 6617,C7,AMD Radeon R7 240 Series<br>
+ */<br>
+ r = parse_one_line(line, id);<br>
+ if (r) {<br>
+ if (r == -EAGAIN) {<br>
+ line_num++;<br>
+ continue;<br>
+ }<br>
+ fprintf(stderr, "Invalid format: %s: line %d: %s\n",<br>
+ AMDGPU_ASIC_ID_TABLE, line_num, line);<br>
+ goto free;<br>
+ }<br>
+<br>
+ line_num++;<br>
+ table_size++;<br>
+<br>
+ if (table_size >= table_max_size) {<br>
+ /* double table size */<br>
+ table_max_size *= 2;<br>
+ asic_id_table = realloc(asic_id_table, table_max_size *<br>
+ sizeof(struct amdgpu_asic_id));<br>
+ if (!asic_id_table) {<br>
+ r = -ENOMEM;<br>
+ goto free;<br>
+ }<br>
+ }<br>
+ }<br>
+<br>
+ /* end of table */<br>
+ id = asic_id_table + table_size;<br>
+ memset(id, 0, sizeof(struct amdgpu_asic_id));<br>
+<br>
+free:<br>
+ free(line);<br>
+<br>
+ if (r && asic_id_table) {<br>
+ while (table_size--) {<br>
+ id = asic_id_table + table_size -1;<br>
+ if (id->marketing_name != NULL)<br>
+ free(id->marketing_name);<br>
+ }<br>
+ free(asic_id_table);<br>
+ asic_id_table = NULL;<br>
+ }<br>
+close:<br>
+ fclose(fp);<br>
+<br>
+ *p_asic_id_table = asic_id_table;<br>
+<br>
+ return r;<br>
+}<br>
diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h<br>
deleted file mode 100644<br>
index 3e7d736..0000000<br>
--- a/amdgpu/amdgpu_asic_id.h<br>
+++ /dev/null<br>
@@ -1,165 +0,0 @@<br>
-/*<br>
- * Copyright © 2016 Advanced Micro Devices, Inc.<br>
- * All Rights Reserved.<br>
- *<br>
- * Permission is hereby granted, free of charge, to any person obtaining a<br>
- * copy of this software and associated documentation files (the "Software"),<br>
- * to deal in the Software without restriction, including without limitation<br>
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,<br>
- * and/or sell copies of the Software, and to permit persons to whom the<br>
- * Software is furnished to do so, subject to the following conditions:<br>
- *<br>
- * The above copyright notice and this permission notice shall be included in<br>
- * all copies or substantial portions of the Software.<br>
- *<br>
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR<br>
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,<br>
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL<br>
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR<br>
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,<br>
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR<br>
- * OTHER DEALINGS IN THE SOFTWARE.<br>
- *<br>
- */<br>
-<br>
-#ifndef __AMDGPU_ASIC_ID_H__<br>
-#define __AMDGPU_ASIC_ID_H__<br>
-<br>
-static struct amdgpu_asic_id_table_t {<br>
- uint32_t did;<br>
- uint32_t rid;<br>
- const char *marketing_name;<br>
-} const amdgpu_asic_id_table [] = {<br>
- {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},<br>
- {0x6600, 0x81, "AMD Radeon R7 M370"},<br>
- {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},<br>
- {0x6604, 0x0, "AMD Radeon R7 M265 Series"},<br>
- {0x6604, 0x81, "AMD Radeon R7 M350"},<br>
- {0x6605, 0x0, "AMD Radeon R7 M260 Series"},<br>
- {0x6605, 0x81, "AMD Radeon R7 M340"},<br>
- {0x6606, 0x0, "AMD Radeon HD 8790M"},<br>
- {0x6607, 0x0, "AMD Radeon HD8530M"},<br>
- {0x6608, 0x0, "AMD FirePro W2100"},<br>
- {0x6610, 0x0, "AMD Radeon HD 8600 Series"},<br>
- {0x6610, 0x81, "AMD Radeon R7 350"},<br>
- {0x6610, 0x83, "AMD Radeon R5 340"},<br>
- {0x6611, 0x0, "AMD Radeon HD 8500 Series"},<br>
- {0x6613, 0x0, "AMD Radeon HD 8500 series"},<br>
- {0x6617, 0xC7, "AMD Radeon R7 240 Series"},<br>
- {0x6640, 0x0, "AMD Radeon HD 8950"},<br>
- {0x6640, 0x80, "AMD Radeon R9 M380"},<br>
- {0x6646, 0x0, "AMD Radeon R9 M280X"},<br>
- {0x6646, 0x80, "AMD Radeon R9 M470X"},<br>
- {0x6647, 0x0, "AMD Radeon R9 M270X"},<br>
- {0x6647, 0x80, "AMD Radeon R9 M380"},<br>
- {0x6649, 0x0, "AMD FirePro W5100"},<br>
- {0x6658, 0x0, "AMD Radeon R7 200 Series"},<br>
- {0x665C, 0x0, "AMD Radeon HD 7700 Series"},<br>
- {0x665D, 0x0, "AMD Radeon R7 200 Series"},<br>
- {0x665F, 0x81, "AMD Radeon R7 300 Series"},<br>
- {0x6660, 0x0, "AMD Radeon HD 8600M Series"},<br>
- {0x6660, 0x81, "AMD Radeon R5 M335"},<br>
- {0x6660, 0x83, "AMD Radeon R5 M330"},<br>
- {0x6663, 0x0, "AMD Radeon HD 8500M Series"},<br>
- {0x6663, 0x83, "AMD Radeon R5 M320"},<br>
- {0x6664, 0x0, "AMD Radeon R5 M200 Series"},<br>
- {0x6665, 0x0, "AMD Radeon R5 M200 Series"},<br>
- {0x6665, 0x83, "AMD Radeon R5 M320"},<br>
- {0x6667, 0x0, "AMD Radeon R5 M200 Series"},<br>
- {0x666F, 0x0, "AMD Radeon HD 8500M"},<br>
- {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},<br>
- {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},<br>
- {0x6798, 0x0, "AMD Radeon HD 7900 Series"},<br>
- {0x679A, 0x0, "AMD Radeon HD 7900 Series"},<br>
- {0x679B, 0x0, "AMD Radeon HD 7900 Series"},<br>
- {0x679E, 0x0, "AMD Radeon HD 7800 Series"},<br>
- {0x67A0, 0x0, "HAWAII XTGL (67A0)"},<br>
- {0x67A1, 0x0, "HAWAII GL40 (67A1)"},<br>
- {0x67B0, 0x0, "AMD Radeon R9 200 Series"},<br>
- {0x67B0, 0x80, "AMD Radeon R9 390 Series"},<br>
- {0x67B1, 0x0, "AMD Radeon R9 200 Series"},<br>
- {0x67B1, 0x80, "AMD Radeon R9 390 Series"},<br>
- {0x67B9, 0x0, "AMD Radeon R9 200 Series"},<br>
- {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},<br>
- {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},<br>
- {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},<br>
- {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},<br>
- {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},<br>
- {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},<br>
- {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},<br>
- {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},<br>
- {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},<br>
- {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},<br>
- {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},<br>
- {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},<br>
- {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},<br>
- {0x67EF, 0xC0, "AMD Radeon RX Graphics"},<br>
- {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},<br>
- {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},<br>
- {0x67EF, 0xC7, "AMD Radeon RX Graphics"},<br>
- {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},<br>
- {0x67EF, 0xEF, "AMD Radeon RX Graphics"},<br>
- {0x67FF, 0xC0, "AMD Radeon RX Graphics"},<br>
- {0x67FF, 0xC1, "AMD Radeon RX Graphics"},<br>
- {0x6800, 0x0, "AMD Radeon HD 7970M"},<br>
- {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},<br>
- {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},<br>
- {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},<br>
- {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},<br>
- {0x6810, 0x81, "AMD Radeon R7 370 Series"},<br>
- {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},<br>
- {0x6811, 0x81, "AMD Radeon R7 300 Series"},<br>
- {0x6818, 0x0, "AMD Radeon HD 7800 Series"},<br>
- {0x6819, 0x0, "AMD Radeon HD 7800 Series"},<br>
- {0x6820, 0x0, "AMD Radeon HD 8800M Series"},<br>
- {0x6820, 0x81, "AMD Radeon R9 M375"},<br>
- {0x6820, 0x83, "AMD Radeon R9 M375X"},<br>
- {0x6821, 0x0, "AMD Radeon HD 8800M Series"},<br>
- {0x6821, 0x87, "AMD Radeon R7 M380"},<br>
- {0x6821, 0x83, "AMD Radeon R9 M370X"},<br>
- {0x6822, 0x0, "AMD Radeon E8860"},<br>
- {0x6823, 0x0, "AMD Radeon HD 8800M Series"},<br>
- {0x6825, 0x0, "AMD Radeon HD 7800M Series"},<br>
- {0x6827, 0x0, "AMD Radeon HD 7800M Series"},<br>
- {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},<br>
- {0x682B, 0x0, "AMD Radeon HD 8800M Series"},<br>
- {0x682B, 0x87, "AMD Radeon R9 M360"},<br>
- {0x682C, 0x0, "AMD FirePro W4100"},<br>
- {0x682D, 0x0, "AMD Radeon HD 7700M Series"},<br>
- {0x682F, 0x0, "AMD Radeon HD 7700M Series"},<br>
- {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},<br>
- {0x6837, 0x0, "AMD Radeon HD7700 Series"},<br>
- {0x683D, 0x0, "AMD Radeon HD 7700 Series"},<br>
- {0x683F, 0x0, "AMD Radeon HD 7700 Series"},<br>
- {0x6900, 0x0, "AMD Radeon R7 M260"},<br>
- {0x6900, 0x81, "AMD Radeon R7 M360"},<br>
- {0x6900, 0x83, "AMD Radeon R7 M340"},<br>
- {0x6901, 0x0, "AMD Radeon R5 M255"},<br>
- {0x6907, 0x0, "AMD Radeon R5 M255"},<br>
- {0x6907, 0x87, "AMD Radeon R5 M315"},<br>
- {0x6920, 0x0, "AMD Radeon R9 M395X"},<br>
- {0x6920, 0x1, "AMD Radeon R9 M390X"},<br>
- {0x6921, 0x0, "AMD Radeon R9 M295X"},<br>
- {0x6929, 0x0, "AMD FirePro S7150"},<br>
- {0x692B, 0x0, "AMD FirePro W7100"},<br>
- {0x6938, 0x0, "AMD Radeon R9 200 Series"},<br>
- {0x6938, 0xF0, "AMD Radeon R9 200 Series"},<br>
- {0x6938, 0xF1, "AMD Radeon R9 380 Series"},<br>
- {0x6939, 0xF0, "AMD Radeon R9 200 Series"},<br>
- {0x6939, 0x0, "AMD Radeon R9 200 Series"},<br>
- {0x6939, 0xF1, "AMD Radeon R9 380 Series"},<br>
- {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},<br>
- {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},<br>
- {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},<br>
- {0x9874, 0xC4, "AMD Radeon R7 Graphics"},<br>
- {0x9874, 0xC5, "AMD Radeon R6 Graphics"},<br>
- {0x9874, 0xC6, "AMD Radeon R6 Graphics"},<br>
- {0x9874, 0xC7, "AMD Radeon R5 Graphics"},<br>
- {0x9874, 0x81, "AMD Radeon R6 Graphics"},<br>
- {0x9874, 0x87, "AMD Radeon R5 Graphics"},<br>
- {0x9874, 0x85, "AMD Radeon R6 Graphics"},<br>
- {0x9874, 0x84, "AMD Radeon R7 Graphics"},<br>
-<br>
- {0x0000, 0x0, "\0"},<br>
-};<br>
-#endif<br>
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c<br>
index f473d2d..9d08744 100644<br>
--- a/amdgpu/amdgpu_device.c<br>
+++ b/amdgpu/amdgpu_device.c<br>
@@ -44,7 +44,6 @@<br>
#include "amdgpu_internal.h"<br>
#include "util_hash_table.h"<br>
#include "util_math.h"<br>
-#include "amdgpu_asic_id.h"<br>
<br>
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))<br>
#define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))<br>
@@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)<br>
<br>
static void amdgpu_device_free_internal(amdgpu_device_handle dev)<br>
{<br>
+ const struct amdgpu_asic_id *id;<br>
amdgpu_vamgr_deinit(&dev->vamgr_32);<br>
amdgpu_vamgr_deinit(&dev->vamgr);<br>
util_hash_table_destroy(dev->bo_flink_names);<br>
@@ -140,6 +140,13 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)<br>
close(dev->fd);<br>
if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))<br>
close(dev->flink_fd);<br>
+ if (dev->asic_ids) {<br>
+ for (id = dev->asic_ids; id->did; id++) {<br>
+ if (id->marketing_name != NULL)<br>
+ free(id->marketing_name);<br>
+ }<br>
+ free(dev->asic_ids);<br>
+ }<br>
free(dev);<br>
}<br>
<br>
@@ -267,6 +274,11 @@ int amdgpu_device_initialize(int fd,<br>
amdgpu_vamgr_init(&dev->vamgr_32, start, max,<br>
dev->dev_info.virtual_address_alignment);<br>
<br>
+ r = amdgpu_parse_asic_ids(&dev->asic_ids);<br>
+ if (r)<br>
+ fprintf(stderr, "%s: Can not parse asic ids, 0x%x.",<br>
+ __func__, r);<br>
+<br>
*major_version = dev->major_version;<br>
*minor_version = dev->minor_version;<br>
*device_handle = dev;<br>
@@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)<br>
<br>
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)<br>
{<br>
- const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;<br>
+ const struct amdgpu_asic_id *id;<br>
+<br>
+ if (!dev->asic_ids)<br>
+ return NULL;<br>
<br>
- while (t->did) {<br>
- if ((t->did == dev->info.asic_id) &&<br>
- (t->rid == dev->info.pci_rev_id))<br>
- return t->marketing_name;<br>
- t++;<br>
+ for (id = dev->asic_ids; id->did; id++) {<br>
+ if ((id->did == dev->info.asic_id) &&<br>
+ (id->rid == dev->info.pci_rev_id))<br>
+ return id->marketing_name;<br>
}<br>
<br>
return NULL;<br>
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h<br>
index cf119a5..9d11bea 100644<br>
--- a/amdgpu/amdgpu_internal.h<br>
+++ b/amdgpu/amdgpu_internal.h<br>
@@ -69,6 +69,12 @@ struct amdgpu_va {<br>
struct amdgpu_bo_va_mgr *vamgr;<br>
};<br>
<br>
+struct amdgpu_asic_id {<br>
+ uint32_t did;<br>
+ uint32_t rid;<br>
+ char *marketing_name;<br>
+};<br>
+<br>
struct amdgpu_device {<br>
atomic_t refcount;<br>
int fd;<br>
@@ -76,6 +82,8 @@ struct amdgpu_device {<br>
unsigned major_version;<br>
unsigned minor_version;<br>
<br>
+ /** Lookup table of asic device id, revision id and marketing name */<br>
+ struct amdgpu_asic_id *asic_ids;<br>
/** List of buffer handles. Protected by bo_table_mutex. */<br>
struct util_hash_table *bo_handles;<br>
/** List of buffer GEM flink names. Protected by bo_table_mutex. */<br>
@@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,<br>
drm_private void<br>
amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);<br>
<br>
+drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);<br>
+<br>
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);<br>
<br>
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);<br>
-- <br>
2.7.4<o:p></o:p></span></p>
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