<div dir="auto"><div>Hi Alex,</div><div dir="auto"><br></div><div dir="auto">Comment below<br><div class="gmail_extra" dir="auto"><br><div class="gmail_quote">Den 11 maj 2017 7:59 em skrev "Alex Deucher" <<a href="mailto:alexdeucher@gmail.com">alexdeucher@gmail.com</a>>:<br type="attribution"><blockquote class="quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Check to make sure the vblank period is long enough to support<br>
mclk switching.<br>
<br>
bug: <a href="https://bugs.freedesktop.org/show_bug.cgi?id=96868" rel="noreferrer" target="_blank">https://bugs.freedesktop.org/<wbr>show_bug.cgi?id=96868</a><br>
<br>
Signed-off-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com">alexander.deucher@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/powerplay/<wbr>hwmgr/smu7_hwmgr.c | 31 +++++++++++++++++++++---<br>
1 file changed, 27 insertions(+), 4 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/<wbr>powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/<wbr>powerplay/hwmgr/smu7_hwmgr.c<br>
index a74a3db..d745065 100644<br>
--- a/drivers/gpu/drm/amd/<wbr>powerplay/hwmgr/smu7_hwmgr.c<br>
+++ b/drivers/gpu/drm/amd/<wbr>powerplay/hwmgr/smu7_hwmgr.c<br>
@@ -2655,6 +2655,28 @@ static int smu7_get_power_state_size(<wbr>struct pp_hwmgr *hwmgr)<br>
return sizeof(struct smu7_power_state);<br>
}<br>
<br>
+static int smu7_vblank_too_short(struct pp_hwmgr *hwmgr,<br>
+ uint32_t vblank_time_us)<br>
+{<br>
+ struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);<br>
+ uint32_t switch_limit_us = data->is_memory_gddr5 ? 450 : 150;<br></blockquote></div></div></div><div dir="auto"><br></div><div dir="auto">This assignment is overwritten below.</div><div dir="auto"><br></div><div dir="auto">BR</div><div dir="auto">Nils</div><div dir="auto"><br></div><div dir="auto"><div class="gmail_extra" dir="auto"><div class="gmail_quote"><blockquote class="quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+<br>
+ switch (hwmgr->chip_id) {<br>
+ case CHIP_POLARIS10:<br>
+ case CHIP_POLARIS11:<br>
+ case CHIP_POLARIS12:<br>
+ switch_limit_us = data->is_memory_gddr5 ? 190 : 150;<br>
+ break;<br>
+ default:<br>
+ switch_limit_us = data->is_memory_gddr5 ? 450 : 150;<br>
+ break;<br>
+ }<br>
+<br>
+ if (vblank_time_us < switch_limit_us)<br>
+ return true;<br>
+ else<br>
+ return false;<br>
+}<br>
<br>
static int smu7_apply_state_adjust_rules(<wbr>struct pp_hwmgr *hwmgr,<br>
struct pp_power_state *request_ps,<br>
@@ -2669,6 +2691,7 @@ static int smu7_apply_state_adjust_rules(<wbr>struct pp_hwmgr *hwmgr,<br>
bool disable_mclk_switching;<br>
bool disable_mclk_switching_for_<wbr>frame_lock;<br>
struct cgs_display_info info = {0};<br>
+ struct cgs_mode_info mode_info = {0};<br>
const struct phm_clock_and_voltage_limits *max_limits;<br>
uint32_t i;<br>
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);<br>
@@ -2677,6 +2700,7 @@ static int smu7_apply_state_adjust_rules(<wbr>struct pp_hwmgr *hwmgr,<br>
int32_t count;<br>
int32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0;<br>
<br>
+ info.mode_info = &mode_info;<br>
data->battery_state = (PP_StateUILabel_Battery ==<br>
request_ps->classification.ui_<wbr>label);<br>
<br>
@@ -2703,8 +2727,6 @@ static int smu7_apply_state_adjust_rules(<wbr>struct pp_hwmgr *hwmgr,<br>
<br>
cgs_get_active_displays_info(<wbr>hwmgr->device, &info);<br>
<br>
- /*TO DO result = PHM_CheckVBlankTime(hwmgr, &vblankTooShort);*/<br>
-<br>
minimum_clocks.engineClock = hwmgr->display_config.min_<wbr>core_set_clock;<br>
minimum_clocks.memoryClock = hwmgr->display_config.min_mem_<wbr>set_clock;<br>
<br>
@@ -2769,8 +2791,9 @@ static int smu7_apply_state_adjust_rules(<wbr>struct pp_hwmgr *hwmgr,<br>
PHM_PlatformCaps_<wbr>DisableMclkSwitchingForFrameLo<wbr>ck);<br>
<br>
<br>
- disable_mclk_switching = (1 < info.display_count) ||<br>
- disable_mclk_switching_for_<wbr>frame_lock;<br>
+ disable_mclk_switching = ((1 < info.display_count) ||<br>
+ disable_mclk_switching_for_<wbr>frame_lock ||<br>
+ smu7_vblank_too_short(hwmgr, mode_info.vblank_time_us));<br>
<br>
sclk = smu7_ps->performance_levels[0]<wbr>.engine_clock;<br>
mclk = smu7_ps->performance_levels[0]<wbr>.memory_clock;<br>
<font color="#888888">--<br>
2.5.5<br>
<br>
______________________________<wbr>_________________<br>
amd-gfx mailing list<br>
<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" rel="noreferrer" target="_blank">https://lists.freedesktop.org/<wbr>mailman/listinfo/amd-gfx</a><br>
</font></blockquote></div><br></div></div></div>