<html> <head> <meta content="text/html; charset=utf-8" http-equiv="Content-Type"> </head> <body text="#000000" bgcolor="#FFFFFF"> see here, I already find dis-advance: enum amd_ip_block_type { AMD_IP_BLOCK_TYPE_COMMON, AMD_IP_BLOCK_TYPE_GMC, AMD_IP_BLOCK_TYPE_IH, AMD_IP_BLOCK_TYPE_SMC, AMD_IP_BLOCK_TYPE_PSP, AMD_IP_BLOCK_TYPE_DCE, AMD_IP_BLOCK_TYPE_GFX, AMD_IP_BLOCK_TYPE_SDMA, AMD_IP_BLOCK_TYPE_UVD, AMD_IP_BLOCK_TYPE_VCE, AMD_IP_BLOCK_TYPE_ACP, AMD_IP_BLOCK_TYPE_GFXHUB, AMD_IP_BLOCK_TYPE_MMHUB }; resume will follow this sequence. but initial sequence is : amdgpu_ip_block_add(adev, &vega10_common_ip_block); amdgpu_ip_block_add(adev, &gfxhub_v1_0_ip_block); amdgpu_ip_block_add(adev, &mmhub_v1_0_ip_block); amdgpu_ip_block_add(adev, &gmc_v9_0_ip_block); amdgpu_ip_block_add(adev, &vega10_ih_ip_block); if (amdgpu_fw_load_type == 2 || amdgpu_fw_load_type == -1) amdgpu_ip_block_add(adev, &psp_v3_1_ip_block); if (!amdgpu_sriov_vf(adev)) amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block); if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) amdgpu_ip_block_add(adev, &dce_virtual_ip_block); #if defined(CONFIG_DRM_AMD_DC) else if (amdgpu_device_has_dc_support(adev)) amdgpu_ip_block_add(adev, &dm_ip_block); #else # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." #endif amdgpu_ip_block_add(adev, &gfx_v9_0_ip_block); amdgpu_ip_block_add(adev, &sdma_v4_0_ip_block); amdgpu_ip_block_add(adev, &uvd_v7_0_ip_block); amdgpu_ip_block_add(adev, &vce_v4_0_ip_block); They are different. I remember I asked you if they are same, don't know why you answer 'yes'. With s3 problem still in there, please do this improvement asap. Regards, David Zhou <div class="moz-cite-prefix">On 2017年05月17日 16:11, zhoucm1 wrote: </div> <blockquote cite="mid:591C05B5.4090902@amd.com" type="cite"> On 2017年05月17日 15:55, Huang Rui wrote: <blockquote type="cite">On Wed, May 17, 2017 at 03:43:47PM +0800, Zhou, David(ChunMing) wrote: <blockquote type="cite">By this change, I suggest to remove mmhub/gfxhub_v1_0_ip_funcs and their IP block, unify them to gmc ip block, this way we cannot lost setting when resume back. </blockquote> From hw side, wo won't have real gmc since this chip, mmhub and gfxhub(gc) instead of it. Maybe we would better to align with hw desgin. </blockquote> I don't see any advance, as you said, we still have gmc block in soc15, why not unify mmhub/gfxhub calls to gmc block? We can keep mmhub/gfxhub_xxx.c file, but ip_funciton isn't necessary. Regards, David Zhou <blockquote type="cite"> Thanks, Rui <blockquote type="cite">Regards, David Zhou On 2017年05月17日 15:38, Huang Rui wrote: <blockquote type="cite">Signed-off-by: Huang Rui <a class="moz-txt-link-rfc2396E" href="mailto:ray.huang@amd.com"><ray.huang@amd.com></a> --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/ </blockquote> amdgpu/gfxhub_v1_0.c <blockquote type="cite">index 005075f..41313514 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c @@ -368,7 +368,7 @@ static int gfxhub_v1_0_suspend(void *handle) static int gfxhub_v1_0_resume(void *handle) { - return 0; + return gfxhub_v1_0_hw_init(handle); } static bool gfxhub_v1_0_is_idle(void *handle) </blockquote> </blockquote> _______________________________________________ amd-gfx mailing list <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <a class="moz-txt-link-freetext" href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a> </blockquote> _______________________________________________ amd-gfx mailing list <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <a class="moz-txt-link-freetext" href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a> </blockquote> </body> </html>