<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> <meta name="Generator" content="Microsoft Exchange Server"> <style></style> </head> <body> <div> <div dir="auto" style="direction:ltr; margin:0; padding:0; font-family:sans-serif; font-size:11pt; color:black; background-color:white"> Sure Alex.<br> </div> <div dir="auto" style="direction:ltr; margin:0; padding:0; font-family:sans-serif; font-size:11pt; color:black; background-color:white"> I shall update the result on stoney soon.<br> </div> <div dir="auto" style="direction:ltr; margin:0; padding:0; font-family:sans-serif; font-size:11pt; color:black; background-color:white"> Regards,<br> </div> <div dir="auto" style="direction:ltr; margin:0; padding:0; font-family:sans-serif; font-size:11pt; color:black; background-color:white"> Shirish S<br> </div> <hr tabindex="-1" style="display:inline-block; width:98%"> <div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Alex Deucher <alexdeucher@gmail.com><br> <b>Sent:</b> Friday, June 9, 2017 6:19:30 PM<br> <b>To:</b> amd-gfx@lists.freedesktop.org<br> <b>Cc:</b> Deucher, Alexander; S, Shirish<br> <b>Subject:</b> [PATCH 2/2] drm/amdgpu/gfx: spread queues across pipes again for 1 MEC parts</font> <div> </div> </div> </div> <font size="2"><span style="font-size:10pt;"> <div class="PlainText">Now that interrupts are properly enabled for all pipes, this<br> should be function properly.<br> <br> Cc: Shirish S <shirish.s@amd.com><br> Signed-off-by: Alex Deucher <alexander.deucher@amd.com><br> ---<br> <br> Shirish,<br> <br> Can you test this change on your Stoney setup?<br> <br> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 12 +++---------<br> 1 file changed, 3 insertions(+), 9 deletions(-)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br> index dfbf027..03c23e3 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br> @@ -125,15 +125,9 @@ void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev)<br> if (mec >= adev->gfx.mec.num_mec)<br> break;<br> <br> - if (adev->gfx.mec.num_mec > 1) {<br> - /* policy: amdgpu owns the first two queues of the first MEC */<br> - if (mec == 0 && queue < 2)<br> - set_bit(i, adev->gfx.mec.queue_bitmap);<br> - } else {<br> - /* policy: amdgpu owns all queues in the first pipe */<br> - if (mec == 0 && pipe == 0)<br> - set_bit(i, adev->gfx.mec.queue_bitmap);<br> - }<br> + /* policy: amdgpu owns the first two queues of the first MEC */<br> + if (mec == 0 && queue < 2)<br> + set_bit(i, adev->gfx.mec.queue_bitmap);<br> }<br> <br> /* update the number of active compute rings */<br> -- <br> 2.5.5<br> <br> </div> </span></font> </body> </html>