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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Please include patch 1 of this series as well.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> S, Shirish
<br>
<b>Sent:</b> Friday, June 09, 2017 8:53 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org; Alex Deucher<br>
<b>Cc:</b> Deucher, Alexander<br>
<b>Subject:</b> Re: [PATCH 2/2] drm/amdgpu/gfx: spread queues across pipes again for 1 MEC parts<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal" style="background:white"><span style="font-size:11.0pt;font-family:"Arial","sans-serif";color:black">Sure Alex.<o:p></o:p></span></p>
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<p class="MsoNormal" style="background:white"><span style="font-size:11.0pt;font-family:"Arial","sans-serif";color:black">I shall update the result on stoney soon.<o:p></o:p></span></p>
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<p class="MsoNormal" style="background:white"><span style="font-size:11.0pt;font-family:"Arial","sans-serif";color:black">Regards,<o:p></o:p></span></p>
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<p class="MsoNormal" style="background:white"><span style="font-size:11.0pt;font-family:"Arial","sans-serif";color:black">Shirish S<o:p></o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:black">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:black"> Alex Deucher <<a href="mailto:alexdeucher@gmail.com">alexdeucher@gmail.com</a>><br>
<b>Sent:</b> Friday, June 9, 2017 6:19:30 PM<br>
<b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>Cc:</b> Deucher, Alexander; S, Shirish<br>
<b>Subject:</b> [PATCH 2/2] drm/amdgpu/gfx: spread queues across pipes again for 1 MEC parts</span><o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-size:10.0pt">Now that interrupts are properly enabled for all pipes, this<br>
should be function properly.<br>
<br>
Cc: Shirish S <<a href="mailto:shirish.s@amd.com">shirish.s@amd.com</a>><br>
Signed-off-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com">alexander.deucher@amd.com</a>><br>
---<br>
<br>
Shirish,<br>
<br>
Can you test this change on your Stoney setup?<br>
<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 12 +++---------<br>
1 file changed, 3 insertions(+), 9 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br>
index dfbf027..03c23e3 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br>
@@ -125,15 +125,9 @@ void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev)<br>
if (mec >= adev->gfx.mec.num_mec)<br>
break;<br>
<br>
- if (adev->gfx.mec.num_mec > 1) {<br>
- /* policy: amdgpu owns the first two queues of the first MEC */<br>
- if (mec == 0 && queue < 2)<br>
- set_bit(i, adev->gfx.mec.queue_bitmap);<br>
- } else {<br>
- /* policy: amdgpu owns all queues in the first pipe */<br>
- if (mec == 0 && pipe == 0)<br>
- set_bit(i, adev->gfx.mec.queue_bitmap);<br>
- }<br>
+ /* policy: amdgpu owns the first two queues of the first MEC */<br>
+ if (mec == 0 && queue < 2)<br>
+ set_bit(i, adev->gfx.mec.queue_bitmap);<br>
}<br>
<br>
/* update the number of active compute rings */<br>
-- <br>
2.5.5<o:p></o:p></span></p>
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