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<p>Reviewed-by: Alex Xie <a class="x_moz-txt-link-rfc2396E" href="mailto:AlexBin.Xie@amd.com">
<AlexBin.Xie@amd.com></a></p>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Tom St Denis <tom.stdenis@amd.com><br>
<b>Sent:</b> Thursday, June 15, 2017 8:14:51 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> StDenis, Tom<br>
<b>Subject:</b> [PATCH umr] Don't read SGPR if wave isn't halted.</font>
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<div class="PlainText">On previous generations this was allowed but on Vega10 it will result<br>
in the occasional system hang.<br>
<br>
Also like others wave status reading is only reliable if<br>
<br>
1) the waves are halted/hung (core is active)<br>
2) or, you disable CG/PG with cg_mask=pg_mask=0<br>
<br>
Even with this patch hangs are possible if PG/CG are still enabled on<br>
Vega10.<br>
<br>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com><br>
---<br>
src/app/print_waves.c | 40 ++++++++++++++++++++++------------------<br>
1 file changed, 22 insertions(+), 18 deletions(-)<br>
<br>
diff --git a/src/app/print_waves.c b/src/app/print_waves.c<br>
index e3662983d8d1..e157db9f9386 100644<br>
--- a/src/app/print_waves.c<br>
+++ b/src/app/print_waves.c<br>
@@ -55,7 +55,8 @@ void umr_print_waves(struct umr_asic *asic)<br>
umr_get_wave_status(asic, se, sh, cu, simd, wave, &ws);<br>
if (ws.wave_status.halt || ws.wave_status.valid) {<br>
// grab sgprs..<br>
- umr_read_sgprs(asic, &ws, &sgprs[0]);<br>
+ if (ws.wave_status.halt)<br>
+ umr_read_sgprs(asic, &ws, &sgprs[0]);<br>
<br>
if (!options.bitfields && first) {<br>
first = 0;<br>
@@ -75,14 +76,15 @@ void umr_print_waves(struct umr_asic *asic)<br>
(unsigned long)ws.hw_id.value, (unsigned long)ws.gpr_alloc.value, (unsigned long)ws.lds_alloc.value, (unsigned long)ws.trapsts.value, (unsigned long)ws.ib_sts.value,<br>
(unsigned long)ws.tba_hi, (unsigned long)ws.tba_lo, (unsigned long)ws.tma_hi, (unsigned long)ws.tma_lo, (unsigned long)ws.ib_dbg0, (unsigned long)ws.m0<br>
);<br>
- for (x = 0; x < ((ws.gpr_alloc.sgpr_size + 1) << shift); x += 4)<br>
- printf(">SGPRS[%u..%u] = { %08lx, %08lx, %08lx, %08lx }\n",<br>
- (unsigned)((ws.gpr_alloc.sgpr_base << shift) + x),<br>
- (unsigned)((ws.gpr_alloc.sgpr_base << shift) + x + 3),<br>
- (unsigned long)sgprs[x],<br>
- (unsigned long)sgprs[x+1],<br>
- (unsigned long)sgprs[x+2],<br>
- (unsigned long)sgprs[x+3]);<br>
+ if (ws.wave_status.halt)<br>
+ for (x = 0; x < ((ws.gpr_alloc.sgpr_size + 1) << shift); x += 4)<br>
+ printf(">SGPRS[%u..%u] = { %08lx, %08lx, %08lx, %08lx }\n",<br>
+ (unsigned)((ws.gpr_alloc.sgpr_base << shift) + x),<br>
+ (unsigned)((ws.gpr_alloc.sgpr_base << shift) + x + 3),<br>
+ (unsigned long)sgprs[x],<br>
+ (unsigned long)sgprs[x+1],<br>
+ (unsigned long)sgprs[x+2],<br>
+ (unsigned long)sgprs[x+3]);<br>
<br>
pgm_addr = (((uint64_t)ws.pc_hi << 32) | ws.pc_lo) - (sizeof(opcodes)/2);<br>
umr_read_vram(asic, ws.hw_id.vm_id, pgm_addr, sizeof(opcodes), opcodes);<br>
@@ -154,15 +156,17 @@ void umr_print_waves(struct umr_asic *asic)<br>
PP(gpr_alloc, sgpr_base);<br>
PP(gpr_alloc, sgpr_size);<br>
<br>
- printf("\n\nSGPRS:\n");<br>
- for (x = 0; x < ((ws.gpr_alloc.sgpr_size + 1) << shift); x += 4)<br>
- printf("\t[%4u..%4u] = { %08lx, %08lx, %08lx, %08lx }\n",<br>
- (unsigned)((ws.gpr_alloc.sgpr_base << shift) + x),<br>
- (unsigned)((ws.gpr_alloc.sgpr_base << shift) + x + 3),<br>
- (unsigned long)sgprs[x],<br>
- (unsigned long)sgprs[x+1],<br>
- (unsigned long)sgprs[x+2],<br>
- (unsigned long)sgprs[x+3]);<br>
+ if (ws.wave_status.halt) {<br>
+ printf("\n\nSGPRS:\n");<br>
+ for (x = 0; x < ((ws.gpr_alloc.sgpr_size + 1) << shift); x += 4)<br>
+ printf("\t[%4u..%4u] = { %08lx, %08lx, %08lx, %08lx }\n",<br>
+ (unsigned)((ws.gpr_alloc.sgpr_base << shift) + x),<br>
+ (unsigned)((ws.gpr_alloc.sgpr_base << shift) + x + 3),<br>
+ (unsigned long)sgprs[x],<br>
+ (unsigned long)sgprs[x+1],<br>
+ (unsigned long)sgprs[x+2],<br>
+ (unsigned long)sgprs[x+3]);<br>
+ }<br>
<br>
printf("\n\nPGM_MEM:\n");<br>
pgm_addr = (((uint64_t)ws.pc_hi << 32) | ws.pc_lo) - (sizeof(opcodes)/2);<br>
-- <br>
2.12.0<br>
<br>
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