<div dir="auto"> Can the atomic ops work on the modified risers used for mining?</div><div class="gmail_extra"> <div class="gmail_quote">On Dec 23, 2017 16:41, "Felix Kühling" <<a href="mailto:felix.kuehling@gmail.com">felix.kuehling@gmail.com</a>> wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">As I understand it, it would require changes in the ROCr Runtime and in the firmware (MEC microcode). It also changes the programming model, so it may affect certain applications or higher level language runtimes that rely on atomic operations. Regards, Felix Am 19.12.2017 um 16:04 schrieb Tom Stellard: > Hi, > > How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd > kernel driver? Is it possible to make modifications to the runtime/kernel > driver to drop this requirement? > > -Tom > _______________________________________________ > amd-gfx mailing list > <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> > <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a> _______________________________________________ amd-gfx mailing list <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a> </blockquote></div></div>