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<p style="margin-top:0;margin-bottom:0"><span>Acked-by: Alex Deucher <alexander.deucher@amd.com></span><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Evan Quan <evan.quan@amd.com><br>
<b>Sent:</b> Friday, December 29, 2017 2:44:38 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Quan, Evan<br>
<b>Subject:</b> [PATCH 3/4] drm/amd/powerplay: removed hwmgr_handle_task unused parameter and given a better name for other parameter</font>
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<div class="PlainText">Change-Id: Iea827bdd8346da1286da8928044fb564c22ca63b<br>
Signed-off-by: Evan Quan <evan.quan@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 4 ++--<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 10 +++++-----<br>
drivers/gpu/drm/amd/include/kgd_pp_interface.h | 2 +-<br>
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 12 ++++++------<br>
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 8 +++-----<br>
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 +-<br>
6 files changed, 18 insertions(+), 20 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h<br>
index a8437a3..8a8d09dd 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h<br>
@@ -328,8 +328,8 @@ enum amdgpu_pcie_gen {<br>
#define amdgpu_dpm_set_mclk_od(adev, value) \<br>
((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value))<br>
<br>
-#define amdgpu_dpm_dispatch_task(adev, task_id, input, output) \<br>
- ((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (input), (output))<br>
+#define amdgpu_dpm_dispatch_task(adev, task_id, user_state) \<br>
+ ((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (user_state))<br>
<br>
#define amdgpu_dpm_check_state_equal(adev, cps, rps, equal) \<br>
((adev)->powerplay.pp_funcs->check_state_equal((adev)->powerplay.pp_handle, (cps), (rps), (equal)))<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c<br>
index 91f809e..b4ade14 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c<br>
@@ -114,7 +114,7 @@ static ssize_t amdgpu_set_dpm_state(struct device *dev,<br>
}<br>
<br>
if (adev->powerplay.pp_funcs->dispatch_tasks) {<br>
- amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state, NULL);<br>
+ amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state);<br>
} else {<br>
mutex_lock(&adev->pm.mutex);<br>
adev->pm.dpm.user_state = state;<br>
@@ -314,7 +314,7 @@ static ssize_t amdgpu_set_pp_force_state(struct device *dev,<br>
if (state != POWER_STATE_TYPE_INTERNAL_BOOT &&<br>
state != POWER_STATE_TYPE_DEFAULT) {<br>
amdgpu_dpm_dispatch_task(adev,<br>
- AMD_PP_TASK_ENABLE_USER_STATE, &state, NULL);<br>
+ AMD_PP_TASK_ENABLE_USER_STATE, &state);<br>
adev->pp_force_state_enabled = true;<br>
}<br>
}<br>
@@ -528,7 +528,7 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev,<br>
amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);<br>
<br>
if (adev->powerplay.pp_funcs->dispatch_tasks) {<br>
- amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);<br>
+ amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);<br>
} else {<br>
adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;<br>
amdgpu_pm_compute_clocks(adev);<br>
@@ -572,7 +572,7 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev,<br>
amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);<br>
<br>
if (adev->powerplay.pp_funcs->dispatch_tasks) {<br>
- amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);<br>
+ amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);<br>
} else {<br>
adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;<br>
amdgpu_pm_compute_clocks(adev);<br>
@@ -1459,7 +1459,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)<br>
}<br>
<br>
if (adev->powerplay.pp_funcs->dispatch_tasks) {<br>
- amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL, NULL);<br>
+ amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL);<br>
} else {<br>
mutex_lock(&adev->pm.mutex);<br>
adev->pm.dpm.new_active_crtcs = 0;<br>
diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h<br>
index ed27626..0f89d2a8 100644<br>
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h<br>
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h<br>
@@ -256,7 +256,7 @@ struct amd_pm_funcs {<br>
void (*powergate_vce)(void *handle, bool gate);<br>
struct amd_vce_state *(*get_vce_clock_state)(void *handle, u32 idx);<br>
int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,<br>
- void *input, void *output);<br>
+ enum amd_pm_state_type *user_state);<br>
int (*load_firmware)(void *handle);<br>
int (*wait_for_fw_loading_complete)(void *handle);<br>
int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);<br>
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c<br>
index 9d3bdad..f3888dd 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c<br>
@@ -33,7 +33,7 @@<br>
#define PP_DPM_DISABLED 0xCCCC<br>
<br>
static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,<br>
- void *input, void *output);<br>
+ enum amd_pm_state_type *user_state);<br>
<br>
static inline int pp_check(struct pp_instance *handle)<br>
{<br>
@@ -198,7 +198,7 @@ static int pp_late_init(void *handle)<br>
ret = pp_check(pp_handle);<br>
if (ret == 0)<br>
pp_dpm_dispatch_tasks(pp_handle,<br>
- AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);<br>
+ AMD_PP_TASK_COMPLETE_INIT, NULL);<br>
<br>
return 0;<br>
}<br>
@@ -397,7 +397,7 @@ static int pp_dpm_force_performance_level(void *handle,<br>
mutex_lock(&pp_handle->pp_lock);<br>
pp_dpm_en_umd_pstate(hwmgr, &level);<br>
hwmgr->request_dpm_level = level;<br>
- hwmgr_handle_task(pp_handle, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);<br>
+ hwmgr_handle_task(pp_handle, AMD_PP_TASK_READJUST_POWER_STATE, NULL);<br>
ret = hwmgr->hwmgr_func->force_dpm_level(hwmgr, level);<br>
if (!ret)<br>
hwmgr->dpm_level = hwmgr->request_dpm_level;<br>
@@ -519,7 +519,7 @@ static void pp_dpm_powergate_uvd(void *handle, bool gate)<br>
}<br>
<br>
static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,<br>
- void *input, void *output)<br>
+ enum amd_pm_state_type *user_state)<br>
{<br>
int ret = 0;<br>
struct pp_instance *pp_handle = (struct pp_instance *)handle;<br>
@@ -530,7 +530,7 @@ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,<br>
return ret;<br>
<br>
mutex_lock(&pp_handle->pp_lock);<br>
- ret = hwmgr_handle_task(pp_handle, task_id, input, output);<br>
+ ret = hwmgr_handle_task(pp_handle, task_id, user_state);<br>
mutex_unlock(&pp_handle->pp_lock);<br>
<br>
return ret;<br>
@@ -805,7 +805,7 @@ static int amd_powerplay_reset(void *handle)<br>
if (ret)<br>
return ret;<br>
<br>
- return hwmgr_handle_task(instance, AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);<br>
+ return hwmgr_handle_task(instance, AMD_PP_TASK_COMPLETE_INIT, NULL);<br>
}<br>
<br>
static int pp_dpm_set_pp_table(void *handle, const char *buf, size_t size)<br>
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c<br>
index 38f7d0d..56de107 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c<br>
@@ -373,7 +373,7 @@ static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type state)<br>
}<br>
<br>
int hwmgr_handle_task(struct pp_instance *handle, enum amd_pp_task task_id,<br>
- void *input, void *output)<br>
+ enum amd_pm_state_type *user_state)<br>
{<br>
int ret = 0;<br>
struct pp_hwmgr *hwmgr;<br>
@@ -395,17 +395,15 @@ int hwmgr_handle_task(struct pp_instance *handle, enum amd_pp_task task_id,<br>
break;<br>
case AMD_PP_TASK_ENABLE_USER_STATE:<br>
{<br>
- enum amd_pm_state_type ps;<br>
enum PP_StateUILabel requested_ui_label;<br>
struct pp_power_state *requested_ps = NULL;<br>
<br>
- if (input == NULL) {<br>
+ if (user_state == NULL) {<br>
ret = -EINVAL;<br>
break;<br>
}<br>
- ps = *(unsigned long *)input;<br>
<br>
- requested_ui_label = power_state_convert(ps);<br>
+ requested_ui_label = power_state_convert(*user_state);<br>
ret = psm_set_user_performance_state(hwmgr, requested_ui_label, &requested_ps);<br>
if (ret)<br>
return ret;<br>
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h<br>
index 80d35d8..bf0bf47 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h<br>
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h<br>
@@ -815,7 +815,7 @@ extern int hwmgr_hw_suspend(struct pp_instance *handle);<br>
extern int hwmgr_hw_resume(struct pp_instance *handle);<br>
extern int hwmgr_handle_task(struct pp_instance *handle,<br>
enum amd_pp_task task_id,<br>
- void *input, void *output);<br>
+ enum amd_pm_state_type *user_state);<br>
extern int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index,<br>
uint32_t value, uint32_t mask);<br>
<br>
-- <br>
2.7.4<br>
<br>
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