<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=iso-2022-jp"> <style type="text/css" style="display:none;"></style> </head> <body dir="ltr"> <div id="divtagdefaultwrapper" style="font-size:12pt;color:#000000;font-family:Calibri,Helvetica,sans-serif;" dir="ltr"> <p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">>But then you're changing the semantics of how pp_dpm_sclk/mclk wok</span><br style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> <span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">>together with pp_dpm_force_performance_level.</span><br style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> <br> Rex:The two sysfs are all for clock range setting.</p> <p style="margin-top:0;margin-bottom:0"><br> </p> <p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">pp_dpm_sclk/mclk/pcie can set sclk/mclk/pcie range separately.</span></p> <p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"><br> </span></p> <p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"></span>and <span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> pp_dpm_force_performance_level, we can support low/high/umd-pstate that set all the clocks range</span><span style="font-size: 14.6667px;">.</span></p> <p style="margin-top:0;margin-bottom:0"><span style="font-size: 14.6667px;">(manual state, driver do nothing except set the flag</span><span style="font-size: 14.6667px;">)</span></p> <p style="margin-top:0;margin-bottom:0"><br> </p> <p style="margin-top:0;margin-bottom:0">No matter what state user enter in, driver can support to continue to change the clock range through pp_dpm_sclk/mclk/pcie.</p> <p style="margin-top:0;margin-bottom:0"><br> </p> <p style="margin-top:0;margin-bottom:0">so in fact, don't need manual state for sepalately set the clock range.</p> <p style="margin-top:0;margin-bottom:0"><br> </p> <p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">>Sysfs interfaces should be maintained stable. I'm OK with breaking the</span><br style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> <span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">>old power profile stuff, because it only affects KFD which isn't</span><br style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> <span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">>upstream yet. </span></p> <p style="margin-top:0;margin-bottom:0"><br> </p> <p style="margin-top:0;margin-bottom:0">Rex: As the old power profile interface can't support Vega.</p> <p style="margin-top:0;margin-bottom:0">so add new interface and we are try to support old asics with new sysfs.</p> <p style="margin-top:0;margin-bottom:0"><br> </p> <p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"><br> </span></p> <p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">>But the old pp_dpm_sclk/mclk and</span><br style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> <span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">>pp_dpm_force_performance_level affect code that's currently upstream and</span><br style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> <span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">>used by existing tools.</span><br> </p> <br> Rex: Yes, we are trying to maintain the sysfs stable. <div> <div>if we change the old sysfs code, we will try to not affect existing tools.</div> <div><br> </div> <div>Best Regards</div> <div>Rex</div> <div><br> <div> <br> <div style="color: rgb(0, 0, 0);"> <hr style="display:inline-block;width:98%" tabindex="-1"> <div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Felix Kuehling <felix.kuehling@amd.com><br> <b>Sent:</b> Thursday, January 25, 2018 7:12 AM<br> <b>To:</b> Zhu, Rex; Huang, JinHuiEric; amd-gfx@lists.freedesktop.org<br> <b>Subject:</b> Re: [PATCH 4/4] drm/amd/pp: Implement set_power_profile_mode on smu7</font> <div> </div> </div> <div class="BodyFragment"><font size="2"><span style="font-size:11pt;"> <div class="PlainText">On 2018-01-24 06:05 PM, Zhu, Rex wrote:<br> > Hi Felix,<br> ><br> > The logic of gfx/computer profile setting works in such way as you<br> > said,need under “auto” state.<br> > But in new sysfs of power profile setting, we do not check the performance<br> > Level.<br> ><br> > And The “manual” state is a confusing flag，when user set manual<br> > state，and then change the clk range through pp-dpm-sclk/mclk，the dpm<br> > still works automatically in new clock range, I think we can remove<br> > this flag.<br> <br> But then you're changing the semantics of how pp_dpm_sclk/mclk wok<br> together with pp_dpm_force_performance_level.<br> <br> Sysfs interfaces should be maintained stable. I'm OK with breaking the<br> old power profile stuff, because it only affects KFD which isn't<br> upstream yet. But the old pp_dpm_sclk/mclk and<br> pp_dpm_force_performance_level affect code that's currently upstream and<br> used by existing tools.<br> <br> ><br> > So My idea is<br> > in the sysfs of pp dpm sclk/mclk, user can set clock range.<br> > In the sysfs of power profile state, user can configure the parameters<br> > smu/driver exposed. They are independent.<br> <br> I disagree. the clock range is not independent of the profile. Profiles<br> correspond to use cases. Different use cases have different clock<br> requirements. For compute we want the clocks to be high. For video you<br> may have requirements for minimum mclks to ensure smooth playback. For<br> power saving you may want to limit maximum clocks, etc. So setting the<br> clock range independent of the profile in "auto" mode does not make<br> sense to me.<br> <br> Regards,<br> Felix<br> <br> ><br> ><br> ><br> ><br> ><br> ><br> > Best Regards<br> > Rex<br> > ------------------------------------------------------------------------<br> > *From:* Kuehling, Felix<br> > *Sent:* Thursday, January 25, 2018 5:41:43 AM<br> > *To:* Zhu, Rex; Huang, JinHuiEric; amd-gfx@lists.freedesktop.org<br> > *Subject:* Re: [PATCH 4/4] drm/amd/pp: Implement<br> > set_power_profile_mode on smu7<br> > <br> > Hi Rex,<br> ><br> > As I understand it (the way power profiles currently work),<br> > pp_dpm_sclk/mclk only apply if pp_dpm_force_performance_level is set to<br> > "manual". Power profiles and automatic switching between profiles only<br> > happens when pp_dpm_force_performance_level is set to "auto".<br> ><br> > This means pp_dpm_sclk/mclk don't apply when profiles are in effect.<br> > Also, there would be no way to set different minimum clocks for<br> > different profiles.<br> ><br> > I think minimum clocks should be part of the profiles.<br> ><br> > Regards,<br> > Felix<br> ><br> ><br> > On 2018-01-24 03:13 PM, Zhu, Rex wrote:<br> > > Hi Eric,<br> > ><br> > > We have sysfs pp-dpm-sclk/mclk to set min dpm level<br> > ><br> > > Best Regards<br> > > Rex<br> > > ------------------------------------------------------------------------<br> > > *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of<br> > > Eric Huang <jinhuieric.huang@amd.com><br> > > *Sent:* Thursday, January 25, 2018 12:04:55 AM<br> > > *To:* amd-gfx@lists.freedesktop.org<br> > > *Subject:* Re: [PATCH 4/4] drm/amd/pp: Implement<br> > > set_power_profile_mode on smu7<br> > > <br> > > We have min_sclk and min_mclk in previous power profile parameters for<br> > > VI, which are similar with min_active_level for Vega10. How to implement<br> > > these parameters?<br> > ><br> > > Regards,<br> > > Eric<br> > ><br> > > On 2018-01-24 04:37 AM, Rex Zhu wrote:<br> > > > User can set smu7 profile pamameters through sysfs<br> > > ><br> > > > echo "0/1/2/3/4">pp_power_profile_mode<br> > > > to select 3D_FULL_SCREEN/POWER_SAVING/VIDEO/VR/COMPUTE<br> > > > mode.<br> > > > echo "5 * * * * * * * *">pp_power_profile_mode<br> > > > to config custom mode.<br> > > > "5 * * * * * * * *" mean "CUSTOM enable_sclk SCLK_UP_HYST<br> > > > SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL enable_mclk MCLK_UP_HYST<br> > > > MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL"<br> > > ><br> > > > Change-Id: Ic6d6f37363bc81ab17051285f6ace847edf725de<br> > > > Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br> > > > ---<br> > > > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 49<br> > > +++++++++++++++++++++++-<br> > > > 1 file changed, 48 insertions(+), 1 deletion(-)<br> > > ><br> > > > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br> > > b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br> > > > index 9f6afd5..13db75c 100644<br> > > > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br> > > > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br> > > > @@ -5036,7 +5036,54 @@ static int smu7_get_power_profile_mode(struct<br> > > pp_hwmgr *hwmgr, char *buf)<br> > > > <br> > > > static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr,<br> > > long *input, uint32_t size)<br> > > > {<br> > > > - /* To Do */<br> > > > + struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);<br> > > > + struct profile_mode_setting tmp;<br> > > > +<br> > > > + hwmgr->power_profile_mode = input[size];<br> > > > +<br> > > > + switch (hwmgr->power_profile_mode) {<br> > > > + case PP_SMC_POWER_PROFILE_CUSTOM:<br> > > > + if (size < 8)<br> > > > + return -EINVAL;<br> > > > +<br> > > > + data->custom_profile_setting.bupdate_sclk = input[0];<br> > > > + data->custom_profile_setting.sclk_up_hyst = input[1];<br> > > > + data->custom_profile_setting.sclk_down_hyst = input[2];<br> > > > + data->custom_profile_setting.sclk_activity = input[3];<br> > > > + data->custom_profile_setting.bupdate_mclk = input[4];<br> > > > + data->custom_profile_setting.mclk_up_hyst = input[5];<br> > > > + data->custom_profile_setting.mclk_down_hyst = input[6];<br> > > > + data->custom_profile_setting.mclk_activity = input[7];<br> > > > + if (!smum_update_dpm_settings(hwmgr,<br> > > &data->custom_profile_setting))<br> > > > + memcpy(&data->current_profile_setting,<br> > > &data->custom_profile_setting, sizeof(struct profile_mode_setting));<br> > > > + break;<br> > > > + case PP_SMC_POWER_PROFILE_FULLSCREEN3D:<br> > > > + case PP_SMC_POWER_PROFILE_POWERSAVING:<br> > > > + case PP_SMC_POWER_PROFILE_VIDEO:<br> > > > + case PP_SMC_POWER_PROFILE_VR:<br> > > > + case PP_SMC_POWER_PROFILE_COMPUTE:<br> > > > + memcpy(&tmp,<br> > > &smu7_profiling[hwmgr->power_profile_mode], sizeof(struct<br> > > profile_mode_setting));<br> > > > + if (!smum_update_dpm_settings(hwmgr, &tmp)) {<br> > > > + if (tmp.bupdate_sclk) {<br> > > > + <br> > > data->current_profile_setting.bupdate_sclk = tmp.bupdate_sclk;<br> > > > + <br> > > data->current_profile_setting.sclk_up_hyst = tmp.sclk_up_hyst;<br> > > > + <br> > > data->current_profile_setting.sclk_down_hyst = tmp.sclk_down_hyst;<br> > > > + <br> > > data->current_profile_setting.sclk_activity = tmp.sclk_activity;<br> > > > + }<br> > > > + if (tmp.bupdate_mclk) {<br> > > > + <br> > > data->current_profile_setting.bupdate_mclk = tmp.bupdate_mclk;<br> > > > + <br> > > data->current_profile_setting.mclk_up_hyst = tmp.mclk_up_hyst;<br> > > > + <br> > > data->current_profile_setting.mclk_down_hyst = tmp.mclk_down_hyst;<br> > > > + <br> > > data->current_profile_setting.mclk_activity = tmp.mclk_activity;<br> > > > + }<br> > > > + }<br> > > > + break;<br> > > > + case PP_SMC_POWER_PROFILE_AUTO: /* TO DO auto wattman feature<br> > > not implement */<br> > > > + return 0;<br> > > > + default:<br> > > > + return -EINVAL;<br> > > > + }<br> > > > +<br> > > > return 0;<br> > > > }<br> > > > <br> > ><br> > > _______________________________________________<br> > > amd-gfx mailing list<br> > > amd-gfx@lists.freedesktop.org<br> > > <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" id="LPlnk116130" previewremoved="true"> https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a> <div id="LPBorder_GT_15168443615140.18904089582307582" style="margin-bottom: 20px; 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Use of all freedesktop.org lists is subject to our Code of ...</div> </td> </tr> </tbody> </table> </div> <br> <br> > ><br> > ><br> > > _______________________________________________<br> > > amd-gfx mailing list<br> > > amd-gfx@lists.freedesktop.org<br> > > <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" id="LPlnk400816" previewremoved="true"> https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a> <div id="LPBorder_GT_15168443901350.3268077149595048" style="margin-bottom: 20px; overflow: auto; width: 100%; text-indent: 0px;"> <table id="LPContainer_15168443901330.04114037224069644" role="presentation" cellspacing="0" style="width: 90%; background-color: rgb(255, 255, 255); position: relative; overflow: auto; padding-top: 20px; padding-bottom: 20px; margin-top: 20px; border-top: 1px dotted rgb(200, 200, 200); border-bottom: 1px dotted rgb(200, 200, 200);"> <tbody> <tr valign="top" style="border-spacing: 0px;"> <td id="TextCell_15168443901340.20393856627357554" colspan="2" style="vertical-align: top; position: relative; padding: 0px; display: table-cell;"> <div id="LPRemovePreviewContainer_15168443901340.3461142991338786"></div> <div id="LPTitle_15168443901340.0711806868259599" style="top: 0px; color: rgb(0, 120, 215); font-weight: normal; font-size: 21px; font-family: wf_segoe-ui_light, "Segoe UI Light", "Segoe WP Light", "Segoe UI", "Segoe WP", Tahoma, Arial, sans-serif; line-height: 21px;"> <a id="LPUrlAnchor_15168443901340.445507855496746" href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" target="_blank" style="text-decoration: none;">amd-gfx Info Page - freedesktop.org</a></div> <div id="LPMetadata_15168443901340.41864238261746256" style="margin: 10px 0px 16px; color: rgb(102, 102, 102); font-weight: normal; font-family: wf_segoe-ui_normal, "Segoe UI", "Segoe WP", Tahoma, Arial, sans-serif; font-size: 14px; line-height: 14px;"> lists.freedesktop.org</div> <div id="LPDescription_15168443901350.09666274708634548" style="display: block; color: rgb(102, 102, 102); font-weight: normal; font-family: wf_segoe-ui_normal, "Segoe UI", "Segoe WP", Tahoma, Arial, sans-serif; font-size: 14px; line-height: 20px; max-height: 100px; overflow: hidden;"> Subscribing to amd-gfx: Subscribe to amd-gfx by filling out the following form. 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