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<p style="margin-top:0;margin-bottom:0">Please include a commit message.  E.g.,</p>
<p style="margin-top:0;margin-bottom:0"><br>
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<p style="margin-top:0;margin-bottom:0">Clamp the clock index to a valid range when reading it back.</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<p style="margin-top:0;margin-bottom:0">Or something like that.  With that fixed:</p>
<p style="margin-top:0;margin-bottom:0">Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Rex Zhu <Rex.Zhu@amd.com><br>
<b>Sent:</b> Saturday, February 10, 2018 11:52:50 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Zhu, Rex<br>
<b>Subject:</b> [PATCH] drm/amd/pp: Add error handling when smu return failed on Vega10.</font>
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<div class="PlainText">Change-Id: I98032904fbb67db1d6b8a37842b340a5be339001<br>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br>
---<br>
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 35 ++++++++++++----------<br>
 1 file changed, 19 insertions(+), 16 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c<br>
index 1a701c3..0430906 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c<br>
@@ -3945,28 +3945,31 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,<br>
 <br>
         switch (idx) {<br>
         case AMDGPU_PP_SENSOR_GFX_SCLK:<br>
-               ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentGfxclkIndex);<br>
-               if (!ret) {<br>
+                       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentGfxclkIndex);<br>
                         vega10_read_arg_from_smc(hwmgr, &sclk_idx);<br>
-                       *((uint32_t *)value) = dpm_table->gfx_table.dpm_levels[sclk_idx].value;<br>
-                       *size = 4;<br>
+                       if (sclk_idx <  dpm_table->gfx_table.count) {<br>
+                               *((uint32_t *)value) = dpm_table->gfx_table.dpm_levels[sclk_idx].value;<br>
+                               *size = 4;<br>
+                       } else {<br>
+                               ret = -EINVAL;<br>
+                       }<br>
                 }<br>
                 break;<br>
         case AMDGPU_PP_SENSOR_GFX_MCLK:<br>
-               ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentUclkIndex);<br>
-               if (!ret) {<br>
-                       vega10_read_arg_from_smc(hwmgr, &mclk_idx);<br>
-                       *((uint32_t *)value) = dpm_table->mem_table.dpm_levels[mclk_idx].value;<br>
-                       *size = 4;<br>
-               }<br>
+               smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentUclkIndex);<br>
+               vega10_read_arg_from_smc(hwmgr, &mclk_idx);<br>
+                       if (mclk_idx <  dpm_table->gfx_table.count) {<br>
+                               *((uint32_t *)value) = dpm_table->mem_table.dpm_levels[mclk_idx].value;<br>
+                               *size = 4;<br>
+                       } else {<br>
+                               ret = -EINVAL;<br>
+                       }<br>
                 break;<br>
         case AMDGPU_PP_SENSOR_GPU_LOAD:<br>
-               ret = smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetAverageGfxActivity, 0);<br>
-               if (!ret) {<br>
-                       vega10_read_arg_from_smc(hwmgr, &activity_percent);<br>
-                       *((uint32_t *)value) = activity_percent > 100 ? 100 : activity_percent;<br>
-                       *size = 4;<br>
-               }<br>
+               smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetAverageGfxActivity, 0);<br>
+               vega10_read_arg_from_smc(hwmgr, &activity_percent);<br>
+               *((uint32_t *)value) = activity_percent > 100 ? 100 : activity_percent;<br>
+               *size = 4;<br>
                 break;<br>
         case AMDGPU_PP_SENSOR_GPU_TEMP:<br>
                 *((uint32_t *)value) = vega10_thermal_get_temperature(hwmgr);<br>
-- <br>
1.9.1<br>
<br>
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