<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> <style type="text/css" style="display:none;"></style> </head> <body dir="ltr"> <div id="divtagdefaultwrapper" style="font-size: 12pt; color: rgb(0, 0, 0); font-family: Calibri, Helvetica, sans-serif, "EmojiFont", "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols;" dir="ltr"> <p style="margin-top:0;margin-bottom:0">Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br> </p> <div style="color: rgb(0, 0, 0);"> <hr style="display:inline-block;width:98%" tabindex="-1"> <div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Tom St Denis <tom.stdenis@amd.com><br> <b>Sent:</b> Monday, February 26, 2018 9:18 AM<br> <b>To:</b> amd-gfx@lists.freedesktop.org<br> <b>Cc:</b> StDenis, Tom<br> <b>Subject:</b> [PATCH] drm/amd/amdgpu: Correct VRAM width for APUs with GMC9</font> <div> </div> </div> <div class="BodyFragment"><font size="2"><span style="font-size:11pt;"> <div class="PlainText">DDR4 has a 64-bit width not 128-bits. It was reporting<br> twice the width. Tested with my Ryzen 2400G.<br> <br> Signed-off-by: Tom St Denis <tom.stdenis@amd.com><br> ---<br> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 ++++-<br> 1 file changed, 4 insertions(+), 1 deletion(-)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c<br> index bc4bd5e7ac94..4dd469188e2b 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c<br> @@ -722,7 +722,10 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)<br> adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);<br> if (!adev->gmc.vram_width) {<br> /* hbm memory channel size */<br> - chansize = 128;<br> + if (adev->flags & AMD_IS_APU)<br> + chansize = 64;<br> + else<br> + chansize = 128;<br> <br> tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);<br> tmp &= DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK;<br> -- <br> 2.14.3<br> <br> _______________________________________________<br> amd-gfx mailing list<br> amd-gfx@lists.freedesktop.org<br> <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" id="LPlnk914329" previewremoved="true">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a><br> </div> </span></font></div> </div> </div> </body> </html>